MPC8280 datasheet(1281/1386 Pages) FREESCALE

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

38-1

Chapter 38

FCC Transparent Controller

The FCC transparent controller functions as a high-speed serial-to-parallel and parallel-to-serial converter.

Transparent mode provides a clear channel on which the FCC performs no bit-level

manipulation—implementing higher-level protocols would require software. Transparent mode is also

referred to as a totally transparent or promiscuous operation.

Basic applications for an FCC in transparent mode include the following:

•

For data, such as voice, moving serially without the need for protocol processing

•

For board-level applications, such as chip-to-chip communications, requiring a serial-to-parallel

and parallel-to-serial conversion

•

For applications requiring the switching of data paths without altering the protocol encoding itself,

such as a multiplexer in which data from a high-speed TDM serial stream is divided into multiple

low-speed data streams

An FCC transmitter and receiver can be programmed in transparent mode independently. Setting

GFMRx[TTx] enables the transparent transmitter; setting GFMRx[TRx] enables the transparent receiver.

Both bits must be set for full-duplex transparent operation. If only one bit is set, the other half of the FCC

operates with the protocol programmed in GFMRx[MODE]. This allows loopback modes to transfer data

from one memory location to another (using DMA) while the data is converted to a specific serial format.

However, the Ethernet and ATM controllers cannot be split in this way. See Section 30.2, “General FCC

Mode Registers (GFMRx).”

The FCC in transparent mode can work with the TSA or NMSI and support modem lines using the

general-purpose I/O signals. The data can be transmitted and received with msb or lsb first in each octet.

The FCC consists of separate transmit and receive sections whose operations are asynchronous with the

core and can either be synchronous or asynchronous with respect to the other FCCs. Each clock can be

supplied from the internal BRG bank or external signals.

38.1

Features

The following is a list of the transparent controller’s important features:

•

Flexible data buffers

•

Automatic SYNC detection on receive

— 16-bit pattern

— 8-bit pattern

— Automatic sync (always synchronized)

— External sync signal support

•

CRCs can optionally be transmitted and received

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