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MPC8280 Datasheet(PDF) 1289 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1289 Page - Freescale Semiconductor, Inc |
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1289 / 1386 page  Serial Peripheral Interface (SPI) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 39-5 Figure 39-3. Multi-Master Configuration The maximum sustained data rate that the SPI supports is SYSTEMCLK/50. However, the SPI can transfer a single character at much higher rates—SYSTEMCLK/4 in master mode and SYSTEMCLK/2 in slave SPIMISO SPIMOSI SELOUT0 SPISEL SPICLK SELOUT3 SELOUT1 SPI #2 SPIMISO SPIMOSI SELOUT1 SPISEL SPICLK SELOUT3 SELOUT2 SPIMISO SPIMOSI SPI #1 SELOUT0 SPISEL SPICLK SELOUT3 SELOUT2 SPI #0 Notes: • All signals are open-drain • For a system with more than two masters, SPISEL and SPIE[MME] do not detect all possible conflicts • It is the responsibility of software to arbitrate for the SPI bus (with token passing, for example) • SELOUT x signals are implemented in software with general-purpose I/O signals SPIMISO SPIMOSI SELOUT0 SPISEL SPICLK SELOUT2 SELOUT1 SPI #3 MPC8280 MPC8280 MPC8280 MPC8280 |
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