MPC8280 datasheet(1297/1386 Pages) FREESCALE

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Serial Peripheral Interface (SPI)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

39-13

39.7

The SPI Buffer Descriptor (BD) Table

As shown in Figure 39-10, BDs are organized into separate RxBD and TxBD tables in dual-port RAM.

The tables have the same basic configuration as for the SCCs and SMCs and form circular queues that

determine the order buffers are transferred. The CP uses BDs to confirm reception and transmission or to

indicate error conditions so that the core knows buffers have been serviced. The buffers themselves can be

placed in external memory or in any unused parameter area of the dual-port RAM.

Figure 39-10. SPI Memory Structure

39.7.1

SPI Buffer Descriptors (BDs)

Receive and transmit BDs report information about each buffer transferred and whether a maskable

interrupt should be generated. Each 64-bit BD, shown in Figure 39-11 and Figure 39-12, has the following

structure:

•

The half word at offset + 0 contains status and control bits. The CP updates the status bits after the

buffer is sent or received.

•

The half word at offset + 2 contains the data length (in bytes) that is sent or received.

— For an RxBD, this is the number of octets the CP writes into this RxBD’s buffer once the BD

closes. The CP updates this field after the received data is placed into the buffer. Memory

allocated for this buffer should be no smaller than MRBLR.

— For a TxBD, this is the number of octets the CP should transmit from its buffer. Normally, this

value should be greater than zero. If the character length is more than 8 bits, the data length

should be even. For example, to send three characters of 8-bit data, 1 start, and 1 stop, the data

length field should be initialized to 3. However, to send three characters of 9-bit data, the data

length field should be initialized to 6 since the three 9-bit data fields occupy three half-words

in memory. The CP never modifies this field.

•

The word at offset + 4 points to the beginning of the buffer.

— For an RxBD, the pointer must be even and can point to internal or external memory.

— For a TxBD, the pointer can be even or odd, unless the character exceeds 8 bits, for which it

must be even. The buffer can be in internal or external memory.

Frame Status

Data Length

Buffer Pointer

Frame Status

Data Length

Buffer Pointer

Tx Buffer

Pointer to SPI

RxBD Table

Rx Buffer

Dual-Port RAM

External Memory

TxBD Table

RxBD Table

Tx Buffer

Pointer to SPI

TxBD Table

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