MPC8280 datasheet(1303/1386 Pages) FREESCALE

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

40-1

Chapter 40

I2C Controller

The inter-integrated circuit (I2C®) controller lets the MPC8280 exchange data with other I2C devices, such

as microcontrollers, EEPROMs, real-time clock devices, A/D converters, and LCD displays. The I2C

controller uses a synchronous, multimaster bus that can connect several integrated circuits on a board. It

uses two signals—serial data (SDA) and serial clock (SCL)—to carry information between the integrated

circuits connected to it.

As shown in Figure 40-1, the I2C controller consists of transmit and receive sections, an independent

baud-rate generator (BRG), and a control unit. The transmit and receive sections use the same clock, which

is derived from the I2C BRG when in master mode and generated externally when in slave mode. Wait

states are inserted during a data transfer if SCL is held low by a slave device. In the middle of a data

transfer, the master I2C controller recognizes the need for wait states by monitoring SCL. However, the

I2C controller has no automatic time-out mechanism if the slave device does not release SCL; therefore,

software should monitor how long SCL stays low to generate bus timeouts.

Figure 40-1. I2C Controller Block Diagram

The I2C receiver and transmitter are double-buffered, which corresponds to an effective two-character

FIFO latency. In normal operation, the transmitter shifts the msb (bit 0) out first. When the I2C is not

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