PIC16F18323-ESLASHSLSQTP datasheet(110/442 Pages) MICROCHIP

110 / 442 page

PIC16(L)F18313/18323

DS40001799A-page 110

Preliminary

 2015 Microchip Technology Inc.

10.2

Data EEPROM

Data EEPROM consists of 256 bytes of user data

memory. The EEPROM provides storage locations for

8-bit user defined data.

EEPROM can be read and/or written through:

• FSR/INDF indirect access (Section 10.3 “FSR

and INDF Access”

)

• NVMREG access (Section 10.4 “NVMREG

Access”

)

• In-Circuit Serial Programming (ICSP)

Unlike Program Flash Memory, which must be written

to by row, EEPROM can be written to word by word.

10.3

FSR and INDF Access

The FSR and INDF registers allow indirect access to

the Program Flash Memory or EEPROM.

10.3.1

FSR READ

With the intended address loaded into an FSR register

a MOVIW instruction or read of INDF will read data from

the Program Flash Memory or EEPROM.

Reading from NVM requires one instruction cycle. The

CPU operation is suspended during the read, and

resumes immediately after. Read operations return a

single word of memory.

10.3.2

FSR WRITE

Writing/erasing the NVM through the FSR registers (ex.

MOVWI

instruction)

not

supported

the

PIC16(L)F18313/18323 devices.

10.4

NVMREG Access

The NVMREG interface allows read/write access to all

the locations accessible by FSRs, and also read/write

access to the User ID locations, and read-only access

to the device identification, revision, and Configuration

data.

Reading, writing, or erasing of NVM via the NVMREG

interface

prevented

when

the

device

code-protected.

10.4.1

NVMREG READ OPERATION

To read a NVM location using the NVMREG interface

the user must:

Clear the NVMREGS bit of the NVMCON1

Program Flash Memory locations, or set

NMVREGS if the user intends to access User

ID, Configuration, or EEPROM locations.

Write

the

desired

address

into

the

NVMADRH:NVMADRL

pair

(Table 10-2).

Set the RD bit of the NVMCON1 register to

initiate the read.

Once the read control bit is set, the CPU operation is

suspended during the read, and resumes immediately

after. The data is available in the very next cycle, in the

NVMDATH:NVMDATL register pair; therefore, it can be

read as two bytes in the following instructions.

NVMDATH:NVMDATL register pair will hold this value

until another read or until it is written to by the user.

Upon completion, the RD bit is cleared by hardware.

PIC16F18323-E/SLSQTP Datasheet(PDF) 110 Page - Microchip Technology

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