VCC

BOP

BRP

t (s)

B (mT)

t (s)

OUT

t (s)

Valid Output

ton

VCC

BOP

BRP

t (s)

B (mT)

t (s)

t (s)

OUT

Valid Output

ton

11

DRV5023

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SLIS151G – MAY 2014 – REVISED SEPTEMBER 2016

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Feature Description (continued)

7.3.3 Power-On Time

After applying VCC to the DRV5023 device, ton must elapse before the OUT pin is valid. During the power-up

sequence, the output is Hi-Z. A pulse as shown in Figure 13 and Figure 14 occurs at the end of ton. This pulse

can allow the host processor to determine when the DRV5023 output is valid after startup. In Case 1 (Figure 13)

and Case 2 (Figure 14), the output is defined assuming a constant magnetic field B > BOP and B < BRP.

Figure 13. Case 1: Power On When B > BOP

Figure 14. Case 2: Power On When B < BRP