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STM32L4S5AI Datasheet(PDF) 216 Page - STMicroelectronics |
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STM32L4S5AI Datasheet(HTML) 216 Page - STMicroelectronics |
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216 / 275 page ![]() Electrical characteristics STM32L4S5xx, STM32L4S7xx and STM32L4S9xx 216/275 DocID030322 Rev 2 SPI characteristics Unless otherwise specified, the parameters given in Table 92 for SPI are derived from tests performed under the ambient temperature, fPCLKx frequency and supply voltage conditions summarized in Table 22: General operating conditions. • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5 x VDD Refer to Section 6.3.17: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI). Table 92. SPI characteristics(1) Symbol Parameter Conditions Min Typ Max(2) Unit fSCK 1/tc(SCK) SPI clock frequency Master mode 2.7 V < VDD < 3.6 V Voltage Range V1 -- 60 MHz Master mode 1.71 V < VDD < 3.6 V Voltage Range V1 46 Master transmitter mode 1.71 V < VDD < 3.6 V Voltage Range V1 60 Slave receiver mode 1.71 V < VDD < 3.6 V Voltage Range V1 60 Slave mode transmitter/full duplex 2.7 V < VDD < 3.6 V Voltage Range V1 33 Slave mode transmitter/full duplex 1.71 V < VDD < 3.6 V Voltage Range V1 21 1.71 V < VDD < 3.6 V Voltage Range V2 13 1.08 V < VDD < 1.32 V(3) 12 tsu(NSS) NSS setup time Slave mode, SPI prescaler = 2 4ₓTPCLK -- ns th(NSS) NSS hold time Slave mode, SPI prescaler = 2 2ₓTPCLK -- ns tw(SCKH) tw(SCKL) SCK high and low time Master mode TPCLK-1 TPCLK TPCLK+1 ns tsu(MI) Data input setup time Master mode 1 - - ns tsu(SI) Slave mode 2.5 - - th(MI) Data input hold time Master mode 6 - - ns th(SI) Slave mode 5.5 - - ta(SO) Data output access time Slave mode 9 - 34 ns |
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