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STM32WBA5MMG Datasheet(PDF) 12 Page - STMicroelectronics |
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STM32WBA5MMG Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 25 page ![]() 7 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 7.1 Device marking Refer to technical note "Reference device marking schematics for STM32 microcontrollers and microprocessors" (TN1433 ) available on www.st.com, for the location of pin 1 / ball A1 as well as the location and orientation of the marking areas versus pin 1 / ball A1. Parts marked as "ES", "E" or accompanied by an engineering sample notification letter, are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity. A WLCSP simplified marking example (if any) is provided in the corresponding package information subsection. 7.2 SiP-LGA76 package information (B0N2) This SiP-LGA is a 76-lead, 8 x 12.5 mm, system in package land grid array package. Figure 5. SiP-LGA76 - Outline B A aaa (4x) eE PIN1 CORNER 0.525 (x4) 0.35X0.35 BOTTOM VIEW 400µm Ref. DETAIL A , 600µm Ref. E1 E (x4) 0.60X0.60 (x68) 0.35X0.30 bbb C SIDE VIEW A A1 Side Wall Sputter : 1~3µm M S A , Top surface Sputter: 3~6µm PIN A1 CORNER 8.000 ref. TOP VIEW 0.625 57 58 56 55 54 53 59 60 61 50 62 52 51 49 48 47 46 45 44 43 42 41 40 39 63 64 65 66 67 38 37 36 35 34 33 32 31 30 29 26 25 24 23 22 28 27 1 2 3 4 8 5 6 9 10 11 12 13 14 15 16 17 18 19 20 21 7 68 69 70 71 72 73 76 75 74 1900 3.050 7.050 1. Drawing is not to scale. STM32WBA5MMG Package information DS14801 - Rev 3 page 12/25 |
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