MSP430F6733IPZ datasheet(70/154 Pages) TI2

70 / 154 page

MSP430F6736

, MSP430F6735, MSP430F6734, MSP430F6733, MSP430F6731, MSP430F6730

MSP430F6726, MSP430F6725, MSP430F6724, MSP430F6723, MSP430F6721, MSP430F6720

SLAS731D – DECEMBER 2011 – REVISED SEPTEMBER 2018

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Detailed Description

6.7.2

Spy-Bi-Wire Interface

In addition to the standard JTAG interface, the MSP430 family supports the 2-wire Spy-Bi-Wire interface.

Spy-Bi-Wire can be used to interface with MSP430 development tools and device programmers. Table 6-8

lists the Spy-Bi-Wire interface pin requirements. For further details on interfacing to development tools and

device programmers, see the MSP430 Hardware Tools User's Guide and MSP430 Programming With the

JTAG Interface.

Table 6-8. Spy-Bi-Wire Pin Requirements and Functions

DEVICE SIGNAL

DIRECTION

FUNCTION

TEST/SBWTCK

Spy-Bi-Wire clock input

RST/NMI/SBWTDIO

IN, OUT

Spy-Bi-Wire data input and output

DVCC

Power supply

DVSS

Ground supply

6.8

Flash Memory

The flash memory can be programmed through the JTAG port, Spy-Bi-Wire (SBW), the BSL, or in-system

by the CPU. The CPU can perform single-byte, single-word, and long-word writes to the flash memory.

Features of the flash memory include:

•

Flash memory has n segments of main memory and four segments of information memory (A to D) of

128 bytes each. Each segment in main memory is 512 bytes in size.

•

Segments 0 to n may be erased in one step, or each segment may be individually erased.

•

Segments A to D can be erased individually, or as a group with segments 0 to n. Segments A to D are

also called information memory.

•

Segment A can be locked separately.

6.9

RAM

The RAM is made up of n sectors. Each sector can be completely powered down to save leakage;

however, all data are lost. Features of the RAM include:

•

RAM has n sectors of 2KB each.

•

Each sector 0 to n can be complete disabled; however, data retention is lost.

•

Each sector 0 to n automatically enters low-power retention mode when possible.

6.10 Backup RAM

The backup RAM provides a limited number of bytes of RAM that are retained during LPMx.5. This

backup RAM is part of the Backup subsystem in MSP430F67xx that operates on dedicated power supply

AUXVCC3. There are 8 bytes of backup RAM available in this device. The backup RAM can be word-wise

accessed through the registers BAKMEM0, BAKMEM1, BAKMEM2, and BAKMEM3. The backup RAM

registers cannot be accessed by the CPU when the high-side SVS is disabled by the user.

MSP430F6733IPZ Datasheet(PDF) 70 Page - Texas Instruments

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