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AT45DB321E Datasheet(PDF) 26 Page - Renesas Technology Corp

Part # AT45DB321E
Description  32-Mbit DataFlash (with Extra 1-Mbits), 2.3 V Minimum SPI Serial Flash Memory
PDF  80 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

AT45DB321E Datasheet(HTML) 26 Page - Renesas Technology Corp

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DS-AT45DB321E-8784 Rev. N
Page 26
9/1/23
© 2023 Renesas Electronics
AT45DB321E Datasheet
7.12 Program/Erase Resume
The Program/Erase Resume command allows a suspended program or erase operation to be resumed and
continue where it left off.
To perform a Program/Erase Resume, an opcode of D0h must be clocked into the device. No address bytes need
to be clocked into the device, and any data clocked in after the opcode are ignored. When the CS pin is
deasserted, the program or erase operation currently suspended is resumed within a time of tRES. The PS1 bit,
PS2 bit, or ES bit in the Status Register then resets back to a Logic 0 state to indicate that the program or erase
operation is no longer suspended. Also, the RDY/BUSY bit in the Status Register indicates that the device is busy
performing a program or erase operation.
During a simultaneous Erase Suspend/Program Suspend condition, issuing the Program/Erase Resume
command results in the program operation resuming first. After the program operation has been completed, the
Program/Erase Resume command must be issued again in order for the erase operation to be resumed.
While the device is busy resuming a program or erase operation, any attempts at issuing the Program/Erase
Suspend command are ignored. Thus, if a resumed program or erase operation needs to be subsequently
suspended again, the system must either wait the entire tRES time before issuing the Program/Erase Suspend
command, or it must check the status of the RDY/BUSY bit or the appropriate PS1, PS2, or ES bit in the Status
Register to determine if the previously suspended program or erase operation has resumed.
7.13 Sector Protection
Two protection methods, hardware and software controlled, are provided for protection against inadvertent or
erroneous program and erase cycles. The software controlled method relies on the use of software commands to
enable and disable sector protection while the hardware controlled method employs the use of the Write Protect
(WP) pin. The selection of which sectors that are to be protected or unprotected against program and erase
operations is specified in the Nonvolatile Sector Protection Register. The status of whether or not sector protection
has been enabled or disabled by either the software or the hardware controlled methods can be determined by
checking the Status Register.



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