ISL33001, ISL33002, ISL33003

FN7560 Rev 6.02

Page 5 of 20

Oct 2, 2023

Pin Descriptions

PIN NAME

PIN

NUMBER

FUNCTION

NOTES

VCC1

8VCC1 power supply, +2.3V to +5.5V. Decouple VCC1 to ground with a high frequency

0.01µF to 0.1µF capacitor.

VCC2

1VCC2 power supply, +2.3V to +5.5V. Decouple VCC2 to ground with a high frequency

0.01µF to 0.1µF capacitor. In level shifting applications, SDA_OUT and SCL_OUT logic

thresholds are referenced to VCC2 supply levels. Connect pull-up resistors on these

pins to VCC2.

ISL33002 (8 LD TDFN, 8 LD MSOP)

ISL33003 (8 LD TDFN, 8 LD MSOP)

GND

4

Device Ground Pin

EN

1

Buffer Enable Pin. Logic “0” disables the device. Logic “1” enables the device. Logic

threshold referenced to VCC1.

ISL33001 (8 LD TDFN, 8 LD SOIC, MSOP)

5

ISL33003 (8 LD TDFN, 8 LD MSOP)

READY

5

Buffer active ‘Ready’ open drain logic output. When buffer is active, READY is high

impedance. When buffer is inactive, READY is low impedance to ground. Connect to

10kΩ pull-up resistor to VCC1.

ISL33001 only

ACC

5

Rise Time Accelerator Enable Pin. Logic “0” disables the accelerator. Logic “1”

enables the accelerator. Logic threshold referenced to VCC1.

ISL33002 only

SDA_IN

6

Data I/O Pins

SDA_OUT

7

SCL_IN

3

Clock I/O Pins

SCL_OUT

2

PAD

Thermal pad should be connected to ground or floated.

Thermal Pad; TDFN only