 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
R5F564MFDDFB Datasheet(PDF) 114 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R5F564MFDDFB Datasheet(HTML) 114 Page - Renesas Technology Corp |
|
|
114 / 162 page  R01DS0173EJ0120 Rev.1.20 Page 114 of 162 Oct 20, 2022 RX64M Group 2. Electrical Characteristics 2.3.7.9 RIIC Table 2.35 RIIC Timing (1/2) Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0, VCC_USBA = AVCC_USBA = 3.0 to 3.6 V, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V, PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, Ta = Topr High-drive output is selected by the driving ability control register. Item Symbol Min.*1, *2 Max. Unit Test Conditions RIIC (Standard-mode, SMBus) ICFER.FMPE = 0 SCL input cycle time tSCL 6(12) × tIICcyc + 1300 — ns Figure 2.55 SCL input high pulse width tSCLH 3(6) × tIICcyc + 300 — ns SCL input low pulse width tSCLL 3(6) × tIICcyc + 300 — ns SCL, SDA input rise time tSr — 1000 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 01(4) × tIICcyc ns SDA input bus free time tBUF 3(6) × tIICcyc + 300 — ns Start condition input hold time tSTAH tIICcyc + 300 — ns Restart condition input setup time tSTAS 1000 — ns Stop condition input setup time tSTOS 1000 — ns Data input setup time tSDAS tIICcyc + 50 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 400 pF RIIC (Fast-mode) ICFER.FMPE = 0 SCL input cycle time tSCL 6(12) × tIICcyc + 600 — ns SCL input high pulse width tSCLH 3(6) × tIICcyc + 300 — ns SCL input low pulse width tSCLL 3(6) × tIICcyc + 300 — ns SCL, SDA input rise time tSr 20 × (External pull-up voltage / 5.5 V) 300 ns SCL, SDA input fall time tSf 20 × (External pull-up voltage / 5.5 V) 300 ns SCL, SDA input spike pulse removal time tSP 01(4) × tIICcyc ns SDA input bus free time tBUF 3(6) × tIICcyc + 300 — ns Start condition input hold time tSTAH tIICcyc + 300 — ns Restart condition input setup time tSTAS 300 — ns Stop condition input setup time tSTOS 300 — ns Data input setup time tSDAS tIICcyc + 50 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 400 pF |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
