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C511 Datasheet(PDF) 56 Page - Siemens Semiconductor Group |
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C511 Datasheet(HTML) 56 Page - Siemens Semiconductor Group |
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56 / 128 page ![]() On-Chip Peripheral Units Semiconductor Group 6-23 Special Function Register T2CON (Address C8H) Reset Value : 00H Bit Function TF2 Timer 2 Overflow Flag. Set by a timer 2 overflow. Must be cleared by software. TF2 will not be set when either RCLK = 1 or TCLK = 1. EXF2 Timer 2 External Flag. Set when either a capture or reload is caused by a negative transition on T2EX and EXEN2 = 1. When timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the timer 2 interrupt routine. EXF2 must be cleared by software. EXF2 does not cause an interrupt in up/down counter mode (DCEN = 1, SFR T2MOD) RCLK Receive Clock Enable. When set, causes the serial port to use timer 2 overflow pulses for its receive clock in serial port modes 1 and 3. RCLK = 0 causes timer 1 overflows to be used for the receive clock. TCLK Transmit Clock Enable. When set, causes the serial port to use timer 2 overflow pulses for its transmit clock in serial port modes 1 and 3. TCLK = 0 causes timer 1 overflow to be used for the transmit clock. EXEN2 Timer 2 External Enable. When set, allows a capture or reload to occur as a result of a negative transition on pin T2EX (P1.1) if timer 2 is not being used to clock the serial port. EXEN2 = 0 causes timer 2 to ignore events at T2EX. TR2 Start / Stop Control for Timer 2. TR2 = 1 starts timer 2. C/T2 Timer or Counter Select for Timer 2. C/T2 = 0 for timer function. C/T2 = 1 for external event counter (falling edge triggered). CP/RL2 Capture / Reload Select. CP/RL2 = 1 causes captures to occur an negative transitions at pin T2EX if EXEN2 = 1. CP/RL2 = 0 causes automatic reloads to occur when timer 2 overflows or negative transitions occur at pin T2EX when EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to auto- reload on timer 2 overflow. TF2 EXF2 RCLK TCLK C8H T2CON Bit No. 7 65 43 21 0 MSB LSB EXEN2 TR2 C/T2 CP/RL2 |
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