CybraTech (2000) Ltd.
SOC-3000/i Scale-On-Chip
ASIC
Technical Specification
Revision B
Page iii
July, 2002
I/O OPERATION.......................................................................................................................................69
8051-COMPATIBLE ON-CHIP PERIPHERALS..................................................................................71
PARALLEL I/O PORTS ..............................................................................................................................71
Timers/Counters..................................................................................................................................71
SOC-3000 INITIALIZATION ..................................................................................................................73
SOC-3000 HARDWARE DESIGN CONSIDERATIONS AND PERIPHERAL INTERFACE
CONNECTIONS ........................................................................................................................................75
LOAD CELL INTERFACE...........................................................................................................................75
4-Wire and 6-Wire Interfaces..............................................................................................................75
Load Cells Connected in Parallel .......................................................................................................77
Load Cell Impedance ..........................................................................................................................78
KEYBOARD INTERFACE ...........................................................................................................................78
LCD DISPLAY INTERFACE ......................................................................................................................79
LED DISPLAY INTERFACE.......................................................................................................................80
EXTERNAL INTERRUPT SOURCES ............................................................................................................80
Using the Vdet input:...........................................................................................................................80
Using Timer0 and Timer1 inputs: .......................................................................................................81
I2C-COMPATIBLE INTERFACE..................................................................................................................81
POWER SAVING SCHEMES .......................................................................................................................81
GROUNDING AND BOARD LAYOUT RECOMMENDATIONS.......................................................................82
IN-CIRCUIT EMULATOR (ICE) SYSTEM ..........................................................................................83
EXAMPLES OF PIN CONFIGURATION PROGRAMMING ............................................................85
EXAMPLE 1: CONFIGURING A 20-DIGIT LCD DISPLAY AND AN 8X8 KEYBOARD...................................85
EXAMPLE 2: CONFIGURING A 16-DIGIT LCD DISPLAY, AN 8X4 KEYBOARD, 8 OUTPUT AND 4 I/O
PORTS ......................................................................................................................................................86
EXAMPLE 3: CONFIGURING A 21-DIGIT LED PARALLEL DISPLAY, AN 8X8 KEYBOARD AND 13
OUTPUT PORTS ........................................................................................................................................87
EXAMPLE 4: OUTPUTS AND I/O PORTS PROGRAMMING .........................................................................88
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