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4553 Datasheet(PDF) 70 Page - Renesas Technology Corp |
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4553 Datasheet(HTML) 70 Page - Renesas Technology Corp |
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70 / 145 page ![]() Rev.3.02 Dec 22, 2006 page 70 of 142 REJ03B0024-0302 4553 Group Stop (state retained) Operating Bit 4 (T34) of timer 3 System clock (STCK) CNTR output auto-control circuit not selected CNTR output auto-control circuit selected Falling edge Rising edge Timer LC control bit Timer LC count source selection bit CNTR output auto-control circuit selection bit CNTR pin input count edge selection bit 0 1 0 1 0 1 0 1 Timer control register W4 at power down : state retained at reset : 00002 W43 W42 W41 W40 R/W TAW4/TW4A Internal dividing resistor for LCD power supply selection bit (Note 2) LCD control bit LCD control register L1 L13 L12 L11 L10 at reset : 00002 at power down : state retained 0 1 0 1 L11 0 0 1 1 L10 0 1 0 1 Duty 1/2 1/3 1/4 Bias 1/2 1/3 1/3 LCD control register L2 at reset : 00002 at power down : state retained W TL2A 0 1 0 1 0 1 0 1 SEG0 VLC3 SEG1 VLC2 SEG2 VLC1 Internal dividing resistor valid Internal dividing resistor invalid L23 L22 L21 L20 SEG0/VLC3 pin function switch bit (Note 3) SEG1/VLC2 pin function switch bit (Note 4) SEG2/VLC1 pin function switch bit (Note 4) Internal dividing resistor for LCD power supply control bit 2r ✕ 3, 2r ✕ 2 r ✕ 3, r ✕ 2 Stop Operating Not available LCD control register L3 at reset : 11112 at power down : state retained W TL3A 0 1 0 1 0 1 0 1 SEG20 P23 SEG19 P22 SEG18 P21 SEG17 P20 L33 L32 L31 L30 P23/SEG20 pin function switch bit P22/SEG19 pin function switch bit P21/SEG18 pin function switch bit P20/SEG17 pin function switch bit Notes 1: “R” represents read enabled, and “W” represents write enabled. 2: “r (resistor) multiplied by 3” is used at 1/3 bias, and “r multiplied by 2” is used at 1/2 bias. 3: VLC3 is connected to VDD internally when SEG0 pin is selected. 4: Use internal dividing resistor when SEG1 and SEG2 pins are selected. R/W TAL1/TL1A LCD duty and bias selection bits |
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