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4553 Datasheet(PDF) 31 Page - Renesas Technology Corp |
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4553 Datasheet(HTML) 31 Page - Renesas Technology Corp |
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31 / 145 page ![]() Rev.3.02 Dec 22, 2006 page 31 of 142 REJ03B0024-0302 4553 Group Fig. 23 Timer structure (2) 1 W42 0 W31, W30 01 00 10 11 T3F (TLCA) (TLCA) Timer 3 interrupt Timer 3 underflow signal (T3UDF) Timer LC (4) Reload register RLC (4) Register A 1/2 LCD clock W43 STCK 1 - - 4 - - - - - - - - 13 14 15 16 Timer 3 (16) W32 XCIN 1 - - - - - - - - - - - - - - 16 Watchdog timer INTSNC Q R S WDF1 WRST instruction Q R S WEF DWDT instruction + WRST instruction RESET signal Q T D R RESET signal Watchdog reset signal 1 W33 0 ORCLK (Note) Notes: The WEF flag is set to “1” at system reset or RAM back-up mode. Data is set automatically from each reload register when timer underflows (auto-reload function). |
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