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SH7243 Datasheet(PDF) 57 Page - Renesas Technology Corp

Part # SH7243
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
PDF  1726 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7243 Datasheet(HTML) 57 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 1.00 Jun. 26, 2008 Page 27 of 1692
REJ09B0393-0100
2.1.4
Register Banks
For the nineteen 32-bit registers comprising general registers R0 to R14, control register GBR, and
system registers MACH, MACL, and PR, high-speed register saving and restoration can be carried
out using a register bank. The register contents are automatically saved in the bank after the CPU
accepts an interrupt that uses a register bank. Restoration from the bank is executed by issuing a
RESBANK instruction in an interrupt processing routine.
For details, refer to section 6.8, Register Banks, and the SH-2A, SH2A-FPU Software Manual.
2.1.5
Initial Values of Registers
Table 2.1 lists the values of the registers after a reset.
Table 2.1
Initial Values of Registers
Classification
Register
Initial Value
R0 to R14
Undefined
General registers
R15 (SP)
Value of the stack pointer in the vector
address table
SR
Bits I[3:0] are 1111 (H'F), BO and CS are
0, reserved bits are 0, and other bits are
undefined
GBR, TBR
Undefined
Control registers
VBR
H'00000000
MACH, MACL, PR
Undefined
System registers
PC
Value of the program counter in the vector
address table



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