SH7243 datasheet(72/1726 Pages) RENESAS

Part #	SH7243

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

PDF	1726 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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72 / 1726 page

Section 2 CPU

Rev. 1.00 Jun. 26, 2008 Page 42 of 1692

REJ09B0393-0100

Instruction Formats

Source

Operand

Destination

Operand

Example

iiiiiiii: Immediate

Indexed GBR

indirect

AND.B

#imm,@(R0,GBR)

iiiiiiii: Immediate

R0 (Register direct)

AND

#imm,R0

i format

xxxx

iiii

iiiiiiii: Immediate

—

TRAPA

#imm

ni format

nnnn

iiii

xxxx

iiii

iiiiiiii: Immediate

nnnn: Register direct ADD

#imm,Rn

nnnn: Register direct

iii: Immediate

—

BLD

#imm3,Rn

ni3 format

xxxx

nnnn

xxxx

iii

—

nnnn: Register direct

iii: Immediate

BST

#imm3,Rn

ni20 format

iiii

xxxx

iiii

xxxx

nnnn

iiiiiiiiiiiiiiiiiiii:

Immediate

nnnn: Register direct MOVI20

#imm20, Rn

nnnndddddddddddd:

displacement

iii: Immediate

—

BLD.B

#imm3,@(disp12,Rn

)

nid format

xxxx

dddd

xxxx

xiii

xxxx

nnnn

—

nnnndddddddddddd:

displacement

iii: Immediate

BST.B

#imm3,@(disp12,Rn

)

Note:

In multiply-and-accumulate instructions, nnnn is the source register.

SH7243 Datasheet(PDF) 72 Page - Renesas Technology Corp

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