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SH7243 Datasheet(PDF) 24 Page - Renesas Technology Corp |
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SH7243 Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 1726 page ![]() Rev. 1.00 Jun. 26, 2008 Page xxiv of xxx 22.2 Architecture .................................................................................................................... 1019 22.3 Programming Model - Overview .................................................................................... 1022 22.3.1 Memory Map .................................................................................................. 1022 22.3.2 Mailbox Structure ........................................................................................... 1023 22.3.3 RCAN-ET Control Registers .......................................................................... 1031 22.3.4 RCAN-ET Mailbox Registers......................................................................... 1050 22.4 Application Note............................................................................................................. 1060 22.4.1 Test Mode Settings ......................................................................................... 1060 22.4.2 Configuration of RCAN-ET ........................................................................... 1061 22.4.3 Message Transmission Sequence.................................................................... 1067 22.4.4 Message Receive Sequence ............................................................................ 1070 22.4.5 Reconfiguration of Mailbox............................................................................ 1072 22.5 Interrupt Sources............................................................................................................. 1074 22.6 DTC Interface ................................................................................................................. 1075 22.7 DMAC Interface ............................................................................................................. 1076 22.8 CAN Bus Interface ......................................................................................................... 1077 Section 23 Pin Function Controller (PFC) ........................................................ 1079 23.1 Register Descriptions...................................................................................................... 1104 23.1.1 Port A I/O Registers H and L (PAIORH and PAIORL) ................................. 1106 23.1.2 Port A Control Registers H2, L1 to L4 (PACRH2, PACRL1 to PACRL4).... 1107 23.1.3 Port A Pull-Up MOS Control Registers H and L (PAPCRH and PAPCRL)................................................................................ 1134 23.1.4 Port B I/O Registers H and L (PBIORH and PBIORL).................................. 1139 23.1.5 Port B Control Registers H1 and L1 to L4 (PBCRH1 and PBCRL1 to PBCRL4)............................................................. 1140 23.1.6 Port B Pull-Up MOS Control Register H and L (PBPCRH and PBPCRL) .... 1164 23.1.7 Port C I/O Register L (PCIORL) .................................................................... 1168 23.1.8 Port C Control Register L1 to L4 (PCCRL1 to PCCRL4).............................. 1168 23.1.9 Port C Pull-Up MOS Control Register L (PCPCRL)...................................... 1186 23.1.10 Port D I/O Registers H and L (PDIORH and PDIORL) ................................. 1187 23.1.11 Port D Control Registers H1 to H4 and L1 to L4 (PDCRH1 to PDCRH4 and PDCRL1 to PDCRL4)........................................ 1187 23.1.12 Port D Pull-Up MOS Control Register H and L (PDPCRH and PDPCRL) ... 1233 23.1.13 Port E I/O Register L (PEIORL)..................................................................... 1237 23.1.14 Port E Control Register L1 to L4 (PECRL1 to PECRL4)............................... 1238 23.1.15 Port E Pull-Up MOS Control Register L (PEPCRL) ...................................... 1264 23.1.16 Large Current Port Control Register (HCPCR) .............................................. 1265 23.1.17 IRQOUT Function Control Register (IFCR) .................................................. 1267 23.2 Pull-Up MOS Control by Pin Function .......................................................................... 1268 |
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