MSP430F2002IPWR datasheet(34/88 Pages) TI

34 / 88 page

MSP430x20x1, MSP430x20x2, MSP430x20x3

MIXED SIGNAL MICROCONTROLLER

SLAS491D -- AUGUST 2005 -- REVISED SEPTEMBER 2007

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (continued)

crystal oscillator, LFXT1, low frequency modes (see Note 4)

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

fLFXT1,LF

LFXT1 oscillator crystal

frequency, LF mode 0, 1

XTS = 0, LFXT1Sx = 0 or 1

1.8 V -- 3.6 V

32,768

fLFXT1,LF,logic

LFXT1 oscillator logic level

square wave input frequency,

LF mode

XTS = 0, LFXT1Sx = 3

1.8 V -- 3.6 V

10,000

32,768

50,000

Oscillation Allowance for LF

XTS = 0, LFXT1Sx = 0;

fLFXT1,LF = 32,768 kHz,

CL,eff =6pF

500

kΩ

OALF

Oscillation Allowance for LF

crystals

XTS = 0, LFXT1Sx = 0;

fLFXT1,LF = 32,768 kHz,

CL,eff =12pF

200

kΩ

XTS = 0, XCAPx = 0

Integrated effective Load

Capacitance LF mode

XTS = 0, XCAPx = 1

5.5

CL,eff

Capacitance, LF mode

(see Note 1)

XTS = 0, XCAPx = 2

8.5

(see Note 1)

XTS = 0, XCAPx = 3

Duty Cycle

LF mode

XTS = 0, Measured at

P1.4/ACLK,

fLFXT1,LF = 32,768 Hz

2.2 V/3 V

fFault,LF

Osc. fault frequency threshold,

LF mode (see Note 3)

XTS = 0, LFXT1Sx = 3

(see Note 2)

2.2 V/3 V

10,000

NOTES: 1. Includes parasitic bond and package capacitance (approximately 2pF per pin).

Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a

correct setup the effective load capacitance should always match the specification of the used crystal.

2. Measured with logic level input frequency but also applies to operation with crystals.

3. Frequencies below the MIN specification will set the fault flag, frequencies above the MAX specification will not set the fault flag.

Frequencies in between might set the flag.

4. To improve EMI on the LFXT1 oscillator the following guidelines should be observed.

-- Keep as short of a trace as possible between the device and the crystal.

-- Design a good ground plane around the oscillator pins.

-- Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.

-- Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.

-- Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.

-- If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.

-- Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other

documentation. This signal is no longer required for the serial programming adapter.

internal very low power, low frequency oscillator (VLO)

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

VLO frequency

-40--85°C

2.2 V/3 V

kHz

fVLO

VLO frequency

105°C

2.2 V/3 V

kHz

dfVLO/dT

VLO frequency

temperature drift

(see Note 1)

I: -40--85°C

T: -40--105°C

2.2 V/3 V

0.5

%/°C

dfVLO/dVCC

VLO frequency supply

voltage drift

(see Note 2)

25°C

1.8V -- 3.6V

%/V

NOTES: 1. Calculated using the box method:

I Version: (MAX(--40...85_C) -- MIN(--40...85_C))/MIN(--40...85_C)/(85_C-- (--40_C))

T Version: (MAX(--40...105_C) -- MIN(--40...105_C))/MIN(--40...105_C)/(105_C-- (--40_C))

2. Calculated using the box method: (MAX(1.8...3.6V) -- MIN(1.8...3.6V))/MIN(1.8...3.6V)/(3.6V -- 1.8V)

MSP430F2002IPWR Datasheet(PDF) 34 Page - Texas Instruments

MSP430F2002IPWR Datasheet(HTML) 34 Page - Texas Instruments

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