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PCI1221 Datasheet(PDF) 52 Page - Texas Instruments |
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PCI1221 Datasheet(HTML) 52 Page - Texas Instruments |
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52 / 123 page ![]() PCI1221 GHK/PDV PC CARD CONTROLLERS SCPS042 – JULY 1998 52 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PCI bus number register Bit 7 6 5 4 3 2 1 0 Name PCI bus number Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 Register: PCI bus number Type: Read/write Offset: 18h (functions 0, 1) Default: 00h Description: This read/write register is programmed by the host system to indicate the bus number of the PCI bus to which the PCI1221 is connected. The PCI1221 uses this register in conjunction with the CardBus bus number and subordinate bus number registers to determine when to forward PCI configuration cycles to its secondary buses. CardBus bus number register Bit 7 6 5 4 3 2 1 0 Name CardBus bus number Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 Register: CardBus bus number Type: Read/write Offset: 19h Default: 00h Description: This read/write register is programmed by the host system to indicate the bus number of the CardBus bus to which the PCI1221 is connected. The PCI1221 uses this register in conjunction with the PCI bus number and subordinate bus number registers to determine when to forward PCI configuration cycles to its secondary buses. This register is separate for each PCI1221 controller function. subordinate bus number register Bit 7 6 5 4 3 2 1 0 Name Subordinate bus number Type R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 Register: Subordinate bus number Type: Read/write Offset: 1Ah Default: 00h Description: This read/write register is programmed by the host system to indicate the highest-numbered bus below the CardBus bus. The PCI1221 uses this register in conjunction with the PCI bus number and CardBus bus number registers to determine when to forward PCI configuration cycles to its secondary buses. This register is separate for each CardBus controller function. |
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