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SH7262 Datasheet(PDF) 4 Page - Renesas Technology Corp |
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SH7262 Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 45 page ![]() SH7262/SH7264 Group High-speed Read/Write Serial Flash Memory Using the Renesas Serial Peripheral Interface REJ06B0889-0100/Rev.1.00 June 2009 Page 4 of 45 Serial flash memory AT26DF161A 2 MB SH7264 RSPCK0 SCK (Serial Clock) SI (Serial Data Input) SSL00 WP# (Write Protect) DIP switches 3.3 V CS# (Chip Select) SO (Serial Data Output) HOLD# 3.3 V 3.3 V MOSI0 MISO0 3.3 V 3.3 V 3.3 V Figure 1 Serial Flash Memory Circuit Note: Pull-up or pull-down the control signal pins by the external resistor To pull up or pull down the control signal pins, determine the signal line level not to cause the external device malfunction when the MCU pin status is in high-impedance. SSL00 pin is pulled up by the external resistor to High- level. Pull up or down the RSPCK0 and MOSI0 pins. As the MISO0 pin is an input pin, pull up or down it to avoid floating to the midpoint voltage. Table 2 Multiplexed Pins SH7264 Port Control Register Peripheral Functions Pin Name Register Name MD bit Setting SH7264 Multiplexed Pin Name RSPI MISO0 PFCR3 PF12MD[2:0] = B'011 PF12/BS#/MISO0/TIOC3D/SPDIF_OUT MOSI0 PFCR2 PF11MD[2:0] = B'011 PF11/A25/SSIDATA3/MOSI0/TIOC3C/SPDIF_IN SSL00 PFCR2 PF10MD[2:0] = B'011 PF10/A24/SSIWS3/SSL00/TIOC3B/FCE# RSPCK0 PFCR2 PF9MD[2:0] = B'011 PF9/A23/SSISCK3/RSPCK0/TIOC3A/FRB Note: SH7264 Multiplexed Pins MISO0, MOSI0, SSL00, and RSPCK0 pins are multiplexed, and set to general-purpose I/O ports as default. Before accessing serial flash memory, use the general-purpose I/O port control register to set the multiplexed pins to RSPI pins. |
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