SH7262 datasheet(12/45 Pages) RENESAS

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SH7262/SH7264 Group

High-speed Read/Write Serial Flash Memory

Using the Renesas Serial Peripheral Interface

REJ06B0889-0100/Rev.1.00

June 2009

Page 12 of 45

2.4

Sample Program Operation

2.4.1

RSPI Initialization Example

Figure 9 and Figure 10 show flow charts of initializing the RSPI in the sample program. This setting enables the SPI

operation in master mode.

Initialize the RSPI

Set the general-purpose I/O ports (PORT)

Set the Control register_0 (SPCR_0)

Set the Pin control register (SPPCR_0)

· Select the multiplexed pins

Function: MISO0, MOSI0, SSL00, RSPCK0

· Set the SPCR_0 (SPCR_0 = H'00)

Function: Disable the RSPI

· Set the SPPCR_0 (SPPCR_0 = H'30)

Functions:

(1) Set the MOSI idle value to 1

(2) Disable to loop-back

· Enable supplying the clock for the RSPI0

Set the Standby control register 5 (STBCR5)

Set the Bit rate register_0 (SPBR_0)

· Set the SPBR_0 (SPBR = H'00)

Function: Set the bit rate as 36 Mbps

(When bus clock is 72 MHz)

Set the Data control register_0 (SPDCR_0)

· Set the SPDCR_0 (SPDCR = H'20)

Functions:

(1) Disable to transmit the dummy data

(2) Set the access width to the SPDR register as 8-bit

Set the Clock delay register_0 (SPCKD_0)

· Set the SPCKD_0 (SPCKD_0 = H'00)

Function: Specify the delay between the SSL signal assertion

and the RSPCK oscillation as 1 RSPCK

Set the Slave select negation delay register_0 (SSLND_0)

· Set the SSLND_0 (SSLND_0 = H'00)

Function: Specify the delay between the RSPCK oscillation stop

to the SSL signal negation as 1 RSPCK

Set the Sequence control register_0 (SPSCR_0)

· Set the SPSCR_0 (SPSCR_0 = H'00)

Function: Specify the sequence length as 1

(Only the SPCMD register 0 is used)

Set the Next-access delay register_0 (SPND_0)

· Set the SPND_0 (SPND_0 = H'00)

Function: Specify the SSL signal negation period after transfer is

complete to 1 RSPCK + 2 bus clocks

Figure 9 RSPI Initialization Flow Chart (1/2)

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