STM32W108HB datasheet(107/179 Pages) STMICROELECTRONICS

107 / 179 page

STM32W108CB, STM32W108HB

General-purpose timers

Doc ID 16252 Rev 2

107/179

Using one timer to enable the other timer

In this example, the enable of Timer 2 is controlled with the output compare 1 of Timer 1.

Refer to Figure 40 for connections. Timer 2 counts on the divided internal clock only when

OC1REF of Timer 1 is high. Both counter clock frequencies are divided by 3 by the

prescaler compared to CK_INT (fCK_CNT = fCK_INT /3).

●

Configure Timer 1 in master mode to send its Output Compare Reference (OC1REF)

signal as trigger output (TIM_MMS = 100 in the TIM1_CR2 register).

●

Configure the Timer 1 OC1REF waveform (TIM1_CCMR1 register).

●

Configure Timer 2 to get the input trigger from Timer 1 (TIM_TS = 000 in the

TIM2_SMCR register).

●

Configure Timer 2 in gated mode (TIM_SMS = 101 in the TIM2_SMCR register).

●

Enable Timer 2 by writing 1 in the TIM_CEN bit (TIM2_CR1 register).

●

Start Timer 1 by writing 1 in the TIM_CEN bit (TIM1_CR1 register).

Note:

The counter 2 clock is not synchronized with counter 1, this mode only affects the Timer 2

counter enable signal.

Figure 41.

Gating timer 2 with OC1REF of timer 1

In the example in Figure 41, the Timer 2 counter and prescaler are not initialized before

being started. So they start counting from their current value. It is possible to start from a

given value by resetting both timers before starting Timer 1, then writing the desired value in

the timer counters. The timers can easily be reset by software using the TIM_UG bit in the

TIMx_EGR registers.

The next example, synchronizes Timer 1 and Timer 2. Timer 1 is the master and starts from

0. Timer 2 is the slave and starts from 0xE7. The prescaler ratio is the same for both timers.

Timer 2 stops when Timer 1 is disabled by writing 0 to the TIM_CEN bit in the TIM1_CR1

●

Configure Timer 1 in master mode to send its Output Compare Reference (OC1REF)

signal as trigger output (TIM_MMS = 100 in the TIM1_CR2 register).

●

Configure the Timer 1 OC1REF waveform (TIM1_CCMR1 register).

●

Configure Timer 2 to get the input trigger from Timer 1 (TIM_TS = 000 in the

TIM2_SMCR register).

●

Configure Timer 2 in gated mode (TIM_SMS = 101 in the TIM2_SMCR register).

●

Reset Timer 1 by writing 1 in the TIM_UG bit (TIM1_EGR register).

●

Reset Timer 2 by writing 1 in the TIM_UG bit (TIM2_EGR register).

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