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STM32W108HB Datasheet(PDF) 109 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 109 Page - STMicroelectronics |
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109 / 179 page  STM32W108CB, STM32W108HB General-purpose timers Doc ID 16252 Rev 2 109/179 Figure 43. Triggering timer 2 with update of timer 1 As in the previous example, both counters can be initialized before starting counting. Figure 42 shows the behavior with the same configuration shown in Figure 43, but in trigger mode instead of gated mode (TIM_SMS = 110 in the TIM2_SMCR register). Figure 44. Triggering timer 2 with enable of timer 1 Starting both timers synchronously in response to an external trigger This example, sets the enable of Timer 1 when its TI1 input rises, and the enable of Timer 2 with the enable of Timer 1. Refer to Figure 40 for connections. To ensure the counters are aligned, Timer 1 must be configured in master/slave mode (slave with respect to TI1, master with respect to Timer 2): ● Configure Timer 1 in master mode to send its Enable as trigger output (TIM_MMS = 001 in the TIM1_CR2 register). ● Configure Timer 1 slave mode to get the input trigger from TI1 (TIM_TS = 100 in the TIM1_SMCR register). ● Configure Timer 1 in trigger mode (TIM_SMS = 110 in the TIM1_SMCR register). ● Configure the Timer 1 in master/slave mode by writing TIM_MSM = 1 (TIM1_SMCR register). |
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