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IMX35 Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc |
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IMX35 Datasheet(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 148 page  i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6 Freescale Semiconductor 30 Figure 7 and Figure 8 depict the master mode and slave mode timings of the CSPI, and Table 25 lists the timing parameters. Figure 7. CSPI Master Mode Timing Diagram Figure 8. CSPI Slave Mode Timing Diagram Table 25. CSPI Interface Timing Parameters ID Parameter Symbol Min. Max. Units CS1 SCLK cycle time tclk 60 — ns CS2 SCLK high or low time tSW 30 — ns CS3 SCLK rise or fall tRISE/FALL —7.6 ns CS4 SS n[3:0] pulse width tCSLH 30 — ns CS5 SS n[3:0] lead time (CS setup time) tSCS 30 — ns CS6 SS n[3:0] lag time (CS hold time) tHCS 30 — ns CS7 MOSI setup time tSmosi 5— ns CS8 MOSI hold time tHmosi 5— ns CS9 MISO setup time tSmiso 5— ns CS1 CS7 CS8 CS2 CS2 CS4 CS6 CS5 CS9 CS10 SCLK SS n[3:0] MOSI MISO SPI_RDY CS11 CS3 CS3 CS7 CS8 CS2 CS2 CS4 CS6 CS9 CS10 SCLK SS n[3:0] MISO MOSI CS1 CS3 CS3 CS5 |
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