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IMX35 Datasheet(PDF) 122 Page - Freescale Semiconductor, Inc

Part # IMX35
Description  i.MX35 Applications Processors for Industrial and Consumer Products
PDF  148 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX35 Datasheet(HTML) 122 Page - Freescale Semiconductor, Inc

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i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6
Freescale Semiconductor
122
4.9.23.1.12
UART Receiver
Figure 98 depicts the RS-232 serial mode receive timing, with 8 data bit/1 stop bit format. Table 79 lists
serial mode receive timing characteristics.
Figure 98. UART RS-232 Serial Mode Receive Timing Diagram
4.9.23.2
UART IrDA Mode Timing
The following subsections give the UART transmit and receive timings in IrDA mode.
4.9.23.2.13
UART IrDA Mode Transmitter
Figure 99 depicts the UART IrDA mode transmit timing, with 8 data bit/1 stop bit format. Table 80 lists
the transmit timing characteristics.
Figure 99. UART IrDA Mode Transmit Timing Diagram
Table 78. RS-232 Serial Mode Transmit Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA1
Transmit Bit Time
tTbit
1/Fbaud_rate
1 –
Tref_clk
2
1 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
2 T
ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).
1/Fbaud_rate +
Tref_clk
—
Table 79. RS-232 Serial Mode Receive Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA2
Receive Bit Time1
1 The UART receiver can tolerate 1/(16 × Fbaud_rate) tolerance in each bit. But accumulation tolerance in one frame must not
exceed 3/(16
× Fbaud_rate).
tRbit
1/Fbaud_rate
2 –
1/(16
× Fbaud_rate)
2 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency) ÷ 16.
1/Fbaud_rate +
1/(16
× Fbaud_rate)
—
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
RXD
(input)
Bit 3
Start
Bit
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA2
UA2
UA2
UA2
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
TXD
(output)
Bit 3
Start
Bit
STOP
BIT
Possible
Parity
Bit
UA3
UA3
UA3
UA3
UA4



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