AT90SCR100 datasheet(113/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

before the low byte is written to ICR1L.

For more information on how to access the 16-bit registers refer to “Accessing 16-bit Registers”

on page 107.

13.2.5.1

Input Capture Trigger Source

The main trigger source for the Input Capture unit is the Input Capture pin (ICP1).

The Input Capture pin (ICP1) is sampled using the same technique as for the Tn pin (Figure 13-

12 on page 106). The edge detector is also identical. However, when the noise canceler is

enabled, additional logic is inserted before the edge detector, which increases the delay by four

system clock cycles.

An Input Capture can be triggered by software by controlling the port of the ICP1 pin.

13.2.5.2

Noise Canceler

The noise canceler improves noise immunity by using a simple digital filtering scheme. The

noise canceler input is monitored over four samples, and all four must be equal to change the

output that in turn is used by the edge detector.

The noise canceler is enabled by setting the Input Capture Noise Canceler (ICNCn) bit in

Timer/Counter Control Register B

(TCCR1B). When enabled the noise canceler introduces addi-

tional four system clock cycles of delay from a change applied to the input, to the update of the

ICR1 Register. The noise canceler uses the system clock and is therefore not affected by the

prescaler.

13.2.5.3

Using the Input Capture Unit

The main challenge when using the Input Capture unit is to assign enough processor capacity

for handling the incoming events. The time between two events is critical. If the processor has

not read the captured value in the ICR1 Register before the next event occurs, the ICR1 will be

overwritten with a new value. In this case the result of the capture will be incorrect.

When using the Input Capture interrupt, the ICR1 Register should be read as early in the inter-

rupt handler routine as possible. Even though the Input Capture interrupt has relatively high

priority, the maximum interrupt response time is dependent on the maximum number of clock

cycles it takes to handle any of the other interrupt requests.

Using the Input Capture unit in any mode of operation when the TOP value (resolution) is

actively changed during operation, is not recommended.

Measurement of an external signal’s duty cycle requires that the trigger edge is changed after

each capture. Changing the edge sensing must be done as early as possible after the ICR1

cleared by software (writing a logical one to the I/O bit location). For measuring frequency only,

the clearing of the ICF1 Flag is not required (if an interrupt handler is used).

The input of the noise canceler and edge detector is always enabled unless the

Timer/Counter is set in a Waveform Generation mode that uses ICR1 to define

TOP.

Note

AT90SCR100 Datasheet(PDF) 113 Page - ATMEL Corporation

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