AT90SCR100 datasheet(23/433 Pages) ATMEL

23 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

When using register indirect addressing modes with automatic pre-decrement and post-incre-

ment, the address registers X, Y, and Z are decremented or incremented.

The 32 general purpose working registers, 64 I/O registers, 160 Extended I/O Registers and the

4096 bytes of internal data SRAM in the AT90SCR100 are all accessible through all these

addressing modes. The Register File is described in “General Purpose Register File” on page

16.

6.2.1

Data Memory Access Times

This section describes the general access timing concepts for internal memory access. The

internal data SRAM access is performed in two clkCPU cycles as described in Figure 6-2.

Figure 6-2.

On-chip Data SRAM Access Cycles

6.3

EEPROM Data Memory

The AT90SCR100 contains 4K bytes of data EEPROM memory. It is organized as a separate

data space, in which single bytes can be read and written. The EEPROM has an endurance of at

least 100,000 write/erase cycles. The access between the EEPROM and the CPU is described

in the following section, specifying the EEPROM Address Registers, the EEPROM Data Regis-

ter, and the EEPROM Control Register.

For a detailed description of SPI and JTAG downloading to the EEPROM, see page 381, and

page 385 respectively.

6.3.1

EEPROM Read/Write Access

The EEPROM Access Registers are accessible in the I/O space.

The write access time for the EEPROM is given in Table 6-2. This is a self-timing function, wich

allows the user software to detect when the next byte can be written. If the user code contains

instructions that write the EEPROM, some precautions must be taken. In heavily filtered power

supplies, VCC is likely to rise or fall slowly on power-up/down. This causes the device, for some

period of time, to run at a voltage lower than specified as minimum, for the clock frequency used.

For details on how to avoid problems in these situations, See “Preventing EEPROM Corruption”

on page 28.

clk

Data

Address

Address valid

Compute Address

CPU

Memory Access Instruction

Next Instruction

AT90SCR100 Datasheet(PDF) 23 Page - ATMEL Corporation