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AT90SCR100 Datasheet(PDF) 207 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 207 Page - ATMEL Corporation |
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207 / 433 page  207 TPR0327AY–SMS–30Jan09 AT90SCR100 Figure 17-2. USB-IC Design Recommendations 17.4 Memory Management The controller does only support the following memory allocation management: The reservation of a Pipe can only be made in the growing order (Pipe 0 to the last Pipe). The firmware shall thus configure them in the same order. The reservation of a Pipe “ki” is done when its ALLOC bit is set. Then, the hardware allocates the memory and insert it between the Pipe “ki-1” and “ki+1”. The “ki+1” Pipe memory “slides” up and its data is lost. Note that the “ki+2” and upper Pipe memory does not slide. Clearing a Pipe enable (PEN) does not clear neither its ALLOC bit, nor its configuration (PSIZE, PBK). To free its memory, the firmware should clear ALLOC. Then, the “ki+1” Pipe memory auto- matically “slides” down. Note that the “ki+2” and upper Pipe memory does not slide. The following figure illustrates the allocation and reorganization of the USB memory in a typical example: AT90SCR100 CC4 CC8 D+ D- 30K Ω < RPDH < 150KΩ RPDH RPDH Bidirectional Commutator GPIO Can be any control pin |
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