PIC16F1933-ESLASHP datasheet(409/418 Pages) MICROCHIP

409 / 418 page

Preliminary

DS41364A-page 407

PIC16F193X/LF193X

Asynchronous Mode ................................................. 215

12-bit Break Transmit and Receive .................. 233

Associated Registers

Receive ..................................................... 221

Transmit.................................................... 217

Auto-Wake-up on Break ................................... 231

Baud Rate Generator (BRG) ............................ 225

Clock Accuracy ................................................. 222

Receiver............................................................ 218

Setting up 9-bit Mode with Address Detect....... 220

Transmitter........................................................ 215

Baud Rate Generator (BRG)

Auto Baud Rate Detect ..................................... 230

Baud Rate Error, Calculating ............................ 225

Baud Rates, Asynchronous Modes .................. 227

Formulas ........................................................... 226

High Baud Rate Select (BRGH Bit) .................. 225

Synchronous Master Mode ............................... 234, 238

Associated Registers

Receive ..................................................... 237

Transmit.................................................... 235

Reception.......................................................... 236

Transmission .................................................... 234

Synchronous Slave Mode

Associated Registers

Receive ..................................................... 239

Transmit.................................................... 238

Reception.......................................................... 239

Transmission .................................................... 238

Extended Instruction Set

ADDFSR ................................................................... 341

Fail-Safe Clock Monitor..................................................... 119

Fail-Safe Condition Clearing ..................................... 119

Fail-Safe Detection ................................................... 119

Fail-Safe Operation ................................................... 119

Reset or Wake-up from Sleep................................... 119

Firmware Instructions........................................................ 337

Fixed Voltage Reference (FVR)

Specifications............................................................ 380

Flash Program Memory .................................................... 321

Erasing...................................................................... 328

Writing....................................................................... 328

FSR Register35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 47, 48

FVRCON (Fixed Voltage Reference Control) Register ..... 156

I2C Mode (MSSP)

Acknowledge Sequence Timing................................ 314

Bus Collision

During a Repeated Start Condition ................... 318

During a Stop Condition.................................... 319

Effects of a Reset...................................................... 315

I2C Clock Rate w/BRG.............................................. 320

Master Mode

Operation .......................................................... 306

Reception.......................................................... 312

Start Condition Timing .............................. 308, 309

Transmission .................................................... 310

Multi-Master Communication, Bus Collision

and Arbitration .................................................. 315

Multi-Master Mode .................................................... 315

Read/Write Bit Information (R/W Bit) ........................ 291

Slave Mode

Transmission .................................................... 296

Sleep Operation........................................................ 315

Stop Condition Timing .............................................. 314

INDF Register35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 47, 48

Indirect Addressing, INDF and FSR Registers ................... 53

Instruction Format............................................................. 338

Instruction Set................................................................... 337

ADDLW..................................................................... 341

ADDWF .................................................................... 341

ADDWFC .................................................................. 341

ANDLW..................................................................... 341

ANDWF .................................................................... 341

BRA .......................................................................... 342

CALL......................................................................... 343

CALLW ..................................................................... 343

LSLF ......................................................................... 345

LSRF ........................................................................ 345

MOVF ....................................................................... 345

MOVIW ..................................................................... 346

MOVLB ..................................................................... 346

MOVWI ..................................................................... 347

OPTION .................................................................... 347

RESET...................................................................... 347

SUBWFB .................................................................. 349

TRIS ......................................................................... 350

BCF .......................................................................... 342

BSF........................................................................... 342

BTFSC ...................................................................... 342

BTFSS ...................................................................... 342

CALL......................................................................... 343

CLRF ........................................................................ 343

CLRW ....................................................................... 343

CLRWDT .................................................................. 343

COMF ....................................................................... 343

DECF........................................................................ 343

DECFSZ ................................................................... 344

GOTO ....................................................................... 344

INCF ......................................................................... 344

INCFSZ..................................................................... 344

IORLW ...................................................................... 344

IORWF...................................................................... 344

MOVLW .................................................................... 346

MOVWF.................................................................... 346

NOP.......................................................................... 347

RETFIE..................................................................... 348

RETLW ..................................................................... 348

RETURN................................................................... 348

RLF........................................................................... 348

RRF .......................................................................... 349

SLEEP ...................................................................... 349

SUBLW..................................................................... 349

SUBWF..................................................................... 349

SWAPF..................................................................... 350

XORLW .................................................................... 350

XORWF .................................................................... 350

INTCON Register................................................................ 73

Internal Oscillator Block

INTOSC

Specifications ................................................... 371

Internal Sampling Switch (RSS) Impedance ..................... 140

Internet Address ............................................................... 413

Interrupt-On-Change......................................................... 103

Associated Registers................................................ 105

Interrupts ............................................................................ 69

ADC .......................................................................... 136

Associated registers w/ Interrupts .............................. 80

PIC16F1933-E/P Datasheet(PDF) 409 Page - Microchip Technology

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