PIC16F1933-ESLASHP datasheet(53/418 Pages) MICROCHIP

53 / 418 page

Preliminary

DS41364A-page 51

PIC16F193X/LF193X

2.2.3.2

OPTION register

The OPTION register, shown in Register 2-2, is a

readable and writable register, which contains various

control bits to configure:

• External INT interrupt

•Timer0

• Weak pull-ups

OPTION_REG: OPTION REGISTER

R/W-1/1

WPUEN

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

WPUEN: Weak Pull-up Enable bit

= All weak pull-ups are disabled (except MCLR, if it is enabled)

= Weak pull-ups are enabled by individual WPUx latch values

bit 6

INTEDG: Interrupt Edge Select bit

= Interrupt on rising edge of RB0/INT pin

= Interrupt on falling edge of RB0/INT pin

bit 5

T0CS: Timer0 Clock Source Select bit

= Transition on RA4/T0CKI pin

= Internal instruction cycle clock (FOSC/4)

bit 4

T0SE: Timer0 Source Edge Select bit

= Increment on high-to-low transition on RA4/T0CKI pin

= Increment on low-to-high transition on RA4/T0CKI pin

bit 3

PSA: Prescaler Assignment bit

= Prescaler is inactive and has no effect on the Timer0 interrupt rate

= Prescaler is active and affects the Timer0 interrupt rate

bit 2-0

PS<2:0>: Prescaler Rate Select bits

000

001

010

011

100

101

110

111

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

Bit Value

Timer0 Rate

PIC16F1933-E/P Datasheet(PDF) 53 Page - Microchip Technology

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