PIC16F1933-ESLASHP datasheet(59/418 Pages) MICROCHIP

59 / 418 page

Preliminary

DS41364A-page 57

PIC16F193X/LF193X

3.0

RESETS

The

PIC16F193X/LF193X

differentiates

between

various kinds of Reset:

Power-on Reset (POR)

WDT Reset during normal operation

MCLR Reset

Brown-out Reset (BOR)

RESET

instruction

Stack Overflow

Stack Underflow

Some registers are not affected in any Reset condition;

their status is unknown on POR and unchanged in any

other Reset. Most other registers are reset to a “Reset

state” on:

• Power-on Reset (POR)

•MCLR Reset

•WDT Reset

• Brown-out Reset (BOR)

Most registers are not affected by a WDT wake-up

since this is viewed as the resumption of normal

operation. TO and PD bits are set or cleared differently

in different Reset situations, as indicated in Table 3-6.

These bits are used in software to determine the nature

of the Reset.

A simplified block diagram of the On-Chip Reset Circuit

is shown in Figure 3-1.

The MCLR Reset path has a noise filter to detect and

ignore small pulses. See Section 28.0 “Electrical

Specifications” for pulse width specifications.

FIGURE 3-1:

SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT

External Reset

MCLR

VDD

OSC1

WDT

Time-out

VDD Rise

Detect

OST/PWRT

LFINTOSC

POR Pulse

OST(2)

10-bit Ripple Counter

PWRT(2)

11-bit Ripple Counter

Enable OST(1)

Enable PWRT

Note 1:

See Table 3-5 for time-out situations.

PWRT and OST counters are reset by POR and BOR.

Brown-out

Reset

BOR

RESET

Instruction

Stack

Pointer

Stack Full/Underflow Reset

Sleep

1024 Cycles

64 ms

MCLRE

Chip_Reset

Enable

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