PIC16F1933-ESLASHP datasheet(70/418 Pages) MICROCHIP

70 / 418 page

PIC16F193X/LF193X

DS41364A-page 68

Preliminary

TABLE 3-7:

RESET CONDITION FOR SPECIAL REGISTERS(2)

TABLE 3-8:

SUMMARY OF REGISTERS ASSOCIATED WITH RESETS

Condition

Program

Counter

STATUS

PCON

Power-on Reset

0000h

---1 1000

00-- 110x

MCLR Reset during normal operation

0000h

---u uuuu

uu-- 0uuu

MCLR Reset during Sleep

0000h

---1 0uuu

uu-- 0uuu

WDT Reset

0000h

---0 uuuu

uu-- uuuu

WDT Wake-up from Sleep

PC + 1

---0 0uuu

uu-- uuuu

Brown-out Reset

0000h

---1 1uuu

00-- 11u0

Interrupt Wake-up from Sleep

PC + 1(1)

---1 0uuu

uu-- uuuu

RESET

Instruction Executed

0000h

---u uuuu

uu-- u0uu

Stack Overflow Reset (STVREN = 1)

0000h

---u uuuu

1u-- uuuu

Stack Underflow Reset (STVREN = 1)

0000h

---u uuuu

u1-- uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.

Note 1:

When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with

the interrupt vector (0004h) after execution of PC + 1.

If a Status bit is not implemented, that bit will be read as ‘0’.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

on Page

BORCON

SBOREN

—

BORRDY

PCON

STKOVF

STKUNF

—

—RMCLR

POR

BOR

STATUS

—

—TO

C50

WDTCON

—

WDTPS4

WDTPS3

WDTPS2

WDTPS1

WDTPS0

SWDTEN

Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.

Shaded cells are not used by Resets.

Note 1:

Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.

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