PCF8576 datasheet(23/44 Pages) PHILIPS

23 / 44 page

2001 Oct 02

Philips Semiconductors

Product speciﬁcation

Universal LCD driver for low multiplex rates

PCF8576

Table 4

Deﬁnition of PCF8576 commands

COMMAND

OPCODE

OPTIONS

DESCRIPTION

MODE SET

C 1

Table 5

Deﬁnes LCD drive mode.

Table 6

Deﬁnes LCD bias conﬁguration.

Table 7

Deﬁnes display status. The possibility to disable the

display allows implementation of blinking under

external control.

Table 8

Deﬁnes power dissipation mode.

LOAD DATA

POINTER

C 0 P5 P4 P3 P2

Table 9

Six bits of immediate data, bits P5 to P0, are

transferred to the data pointer to deﬁne one of forty

display RAM addresses.

DEVICE

SELECT

C 1

Table 10

Three bits of immediate data, bits A2 to A0, are

transferred to the subaddress counter to deﬁne one of

eight hardware subaddresses.

BANK

SELECT

C 1

1110

Table 11

Deﬁnes input bank selection (storage of arriving

display data).

Table 12

Deﬁnes output bank selection (retrieval of LCD display

data). The BANK SELECT command has no effect in

1 : 3 and 1 : 4 multiplex drive modes.

BLINK

C 1

BF1 BF0

Table 13

Deﬁnes the blinking frequency.

Table 14

Selects the blinking mode; normal operation with

frequency set by BF1, BF0 or blinking by alternation of

display RAM banks. Alternation blinking does not

apply in 1 : 3 and 1 : 4 multiplex drive modes.

Table 5

MODE SET option 1

Table 6

MODE SET option 2

Table 7

MODE SET option 3

Table 8

MODE SET option 4

Table 9

LOAD DATA POINTER option 1

Table 10 DEVICE SELECT option 1

Table 11 BANK SELECT option 1

LCD DRIVE MODE

BITS

DRIVE MODE

BACKPLANE

Static

1 BP

1 : 2

MUX (2 BP)

1 : 3

MUX (3 BP)

1 : 4

MUX (4 BP)

LCD BIAS

BIT B

⁄3bias

⁄2bias

DISPLAY STATUS

BIT E

Disabled (blank)

Enabled

MODE

BIT LP

Normal mode

Power-saving mode

DESCRIPTION

BITS

6-bit binary value of 0 to 39 P5 P4 P3 P2 P1 P0

DESCRIPTION

BITS

3-bit binary value of 0 to 7

STATIC

1 : 2 MUX

BIT I

RAM bit 0

RAM bits 0 and 1

RAM bit 2

RAM bits 2 and 3

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