HT45F43 datasheet(114/152 Pages) HOLTEK

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Interrupts

Interrupts are an important part of any microcontroller system. When an external event or an internal

function such as a Timer/Event Counter or an A/D converter requires microcontroller attention, their

corresponding interrupt will enforce a temporary suspension of the main program allowing the

microcontroller to direct attention to their respective needs. The device contains several external

interrupt and internal interrupts functions. The external interrupts are controlled by the action of the

external INT0, INT1 and PINT pins, while the internal interrupts are controlled by the Timer/Event

Counter overflows, the Time Base interrupts, the SPI/I

2C interrupt, the A/D converter interrupt,

Comparator interrupt, EEPROM interrupt and LVD interrupt.

Interrupt Registers

Overall interrupt control, which means interrupt enabling and request flag setting, is controlled by the

INTC0, INTC1, MFIC0 and MFIC1 registers, which are located in the Data Memory. By controlling

the appropriate enable bits in these registers each individual interrupt can be enabled or disabled. Also

when an interrupt occurs, the corresponding request flag will be set by the microcontroller. The global

enable flag if cleared to zero will disable all interrupts.

Interrupt Operation

A Timer/Event Counter overflow, Time Base 0/1, SPI/I

2C data transfer complete, an end of A/D

conversion, the external interrupt line being triggered , a comparator output, an EEPROM Write or

Read cycle ends, or a LVD detection will all generate an interrupt request by setting their

corresponding request flag, if their appropriate interrupt enable bit is set. When this happens, the

Program Counter, which stores the address of the next instruction to be executed, will be transferred

onto the stack. The Program Counter will then be loaded with a new address which will be the value of

the corresponding interrupt vector. The microcontroller will then fetch its next instruction from this

interrupt vector. The instruction at this vector will usually be a JMP statement which will jump to

another section of program which is known as the interrupt service routine. Here is located the code to

control the appropriate interrupt. The interrupt service routine must be terminated with a RETI

statement, which retrieves the original Program Counter address from the stack and allows the

microcontroller to continue with normal execution at the point where the interrupt occurred.

The various interrupt enable bits, together with their associated request flags, are shown in the

accompanying diagram with their order of priority.

Once an interrupt subroutine is serviced, all the other interrupts will be blocked, as the EMI bit will be

cleared automatically. This will prevent any further interrupt nesting from occurring. However, if other

interrupt requests occur during this interval, although the interrupt will not be immediately serviced,

the request flag will still be recorded. If an interrupt requires immediate servicing while the program is

already in another interrupt service routine, the EMI bit should be set after entering the routine, to

allow interrupt nesting. If the stack is full, the interrupt request will not be acknowledged, even if the

related interrupt is enabled, until the Stack Pointer is decremented. If immediate service is desired, the

stack must be prevented from becoming full.

Rev. 1.20

114

September 15, 2011

HT45F23/HT45F43

8-Bit Flash MCU with Op Amps & Comparators

HT45F43 Datasheet(PDF) 114 Page - Holtek Semiconductor Inc

HT45F43 Datasheet(HTML) 114 Page - Holtek Semiconductor Inc

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