HT45F43 datasheet(115/152 Pages) HOLTEK

115 / 152 page

Interrupt Priority

Interrupts, occurring in the interval between the rising edges of two consecutive T2 pulses, will be

serviced on the latter of the two T2 pulses, if the corresponding interrupts are enabled. In case of

simultaneous requests, the following table shows the priority that is applied.

Interrupt Source

Priority

Vector

External Interrupt 0

04H

External Interrupt 1

08H

Timer/Event Counter 0 Overflow

0CH

Timer/Event Counter 1 Overflow

10H

SPI/I

2C Interrupt

14H

Multi-function Interrupt

18H

The A/D converter interrupt, Time Base interrupt, External Peripheral interrupt, Comparator inter-

rupt, EEPROM interrupt, and LVD interrupt all share the same interrupt vector which is 18H. Each

of these interrupts has their own individual interrupt flag but also share the same MFF interrupt flag.

The MFF flag will be cleared by hardware once the Multi-function interrupt is serviced, however the

individual interrupts that have triggered the Multi-function interrupt need to be cleared by the appli-

cation program.

INTC0 Register

Bit

76543210

Name

T0F

EIF1

EIF0

ET0I

EEI1

EEI0

EMI

R/W

POR

0000000

Bit 7

unimplemented, read as

²0²

Bit 6

T0F: Timer/Event counter 0 interrupt request flag

0: inactive

1: active

Bit 5

EIF1: External interrupt 1 request flag

0: inactive

1: active

Bit 4

EIF0: External interrupt 0 request flag

0: inactive

1: active

Bit 3

ET0I: Timer/Event counter 0 interrupt enable

0: disable

1: enable

Bit 2

EEI1: External interrupt 1 enable

0: disable

1: enable

Bit 1

EEI0: External interrupt 0 enable

0: disable

1: enable

Bit 0

EMI: Master interrupt global enable

0: global disable

1: global enable

HT45F23/HT45F43

8-Bit Flash MCU with Op Amps & Comparators

Rev. 1.20

115

September 15, 2011

HT45F43 Datasheet(PDF) 115 Page - Holtek Semiconductor Inc

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