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SPC56EC64L8 Datasheet(PDF) 53 Page - STMicroelectronics |
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SPC56EC64L8 Datasheet(HTML) 53 Page - STMicroelectronics |
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53 / 118 page ![]() SPC564Bxx - SPC56ECxx Electrical Characteristics Doc ID 17478 Rev 4 53/118 Note: SRAM retention guaranteed to LVD levels. 4.5 Thermal characteristics 4.5.1 Package thermal characteristics IINJPAD SR Injected input current on any pin during overload condition —–5 5 mA IINJSUM SR Absolute sum of all injected input currents during overload condition — –50 50 TVDD SR VDD_HV_A slope to ensure correct power up(8) —— 0.5 V/µs — 0.5 — V/min TA C-Grade Part SR Ambient temperature under bias — −40 85 °C TJ C-Grade Part SR Junction temperature under bias — −40 110 TA V-Grade Part SR Ambient temperature under bias — −40 105 TJ V-Grade Part SR Junction temperature under bias — −40 130 TA M-Grade Part SR Ambient temperature under bias — −40 125 TJ M-Grade Part SR Junction temperature under bias — −40 150 1. 100 nF EMI capacitance and 10 µF bulk capacitance needs to be provided between each VDD_HV_A/HV_B/VSS_HV pair. 2. Full device operation is guaranteed by design from 3.0 V–5.5 V. OSC electrical characteristics (startup time, IDD, negative resistance, ESR and duty cycle) will not be guaranteed to stay within the stated limits when operating below 4.5 V and above 3.6 V. However, OSC functionality is guaranteed within the entire range (3.0 V–5.5 V). 3. 100 nF EMI capacitance and 40 µF bulk capacitance needs to be provided between each VDD_LV/VSS_LV supply pair. 4. This voltage is internally generated by the device and no external voltage should be supplied. 5. 100 nF capacitance needs to be provided between VDD_HV_(ADC0/ADC1)/VSS_HV_(ADC0/ADC1) pair. 6. Both the relative and the fixed conditions must be met. For instance: If VDD_HV_A is 5.9 V, VDD_HV_ADC0 maximum value is 6.0 V then, despite the relative condition, the max value is VDD_HV_A + 0.3 = 6.2 V. 7. PA3, PA7, PA10, PA11 and PE12 ADC_1 channels are coming from VDD_HV_B domain hence VDD_HV_ADC1 should be within ±100 mV of VDD_HV_B when these channels are used for ADC_1. 8. Guaranteed by device validation. Table 11. Recommended operating conditions (5.0 V) (continued) Symbol Parameter Conditions Value Unit Min Max Table 12. LQFP thermal characteristics(1) Symbol C Parameter Conditions(2) Pin count Value(3) Unit Min Typ Max RθJA CC D Thermal resistance, junction-to-ambient natural convection Single-layer board—1s 176 — — 44.4(4) °C/W 208 — — TBD °C/W RθJA CC D Thermal resistance, junction-to-ambient natural convection Four-layer board—2s2p(5) 176 — — 36.1 °C/W 208 — — TBD °C/W |
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