SPC56EC64L8 datasheet(60/118 Pages) STMICROELECTRONICS

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Electrical Characteristics

SPC564Bxx - SPC56ECxx

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Doc ID 17478 Rev 4

4.6.5

I/O pad current specification

The I/O pads are distributed across the I/O supply segment. Each I/O supply is associated

to a VDD/VSS_HV supply pair as described in Table 20.

Table 21 provides I/O consumption figures.

In order to ensure device reliability, the average current of the I/O on a single segment

should remain below the IAVGSEG maximum value.

In order to ensure device functionality, the sum of the dynamic and static current of the I/O

on a single segment should remain below the IDYNSEG maximum value.

VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified.

VDD as mentioned in the table is VDD_HV_A/VDD_HV_B.

All values need to be confirmed during device validation.

CL includes device and package capacitances (CPKG < 5 pF).

Table 20.

I/O supplies

Package

I/O Supplies

LBGA256

Equivalent to 208-pin LQFP segment pad distribution + G6, G11, H11, J11

LQFP208

pin6

(VDD_HV_A)

pin7

(VSS_HV)

pin27

(VDD_HV_A)

pin28

(VSS_HV)

pin73

(VSS_HV)

pin75

(VDD_HV_A)

pin101

(VDD_HV_A)

pin102

(VSS_HV)

pin132

(VSS_HV)

pin133

(VDD_HV_A)

pin147

(VSS_HV)

pin148

(VDD_HV_B)

pin174

(VSS_HV)

pin175

(VDD_HV_A)

—

LQFP176

pin6

(VDD_HV_A)

pin7

(VSS_HV)

pin27

(VDD_HV_A)

pin28

(VSS_HV)

pin57

(VSS_HV)

pin59

(VDD_HV_A)

pin85

(VDD_HV_A)

pin86

(VSS_HV)

pin123

(VSS_HV)

pin124

(VDD_HV_B)

pin150

(VSS_HV)

pin151

(VDD_HV_A)

——

Table 21.

I/O consumption

Symbol

Parameter

Conditions(1),(2)

Value(3)

Unit

Min

Typ

Max

ISWTSLW

(4)

CC D

Peak I/O current for

SLOW configuration

CL = 25 pF

VDD = 5.0 V ± 10%,

PAD3V5V = 0

—

19.9

VDD = 3.3 V ± 10%,

PAD3V5V = 1

—

15.5

ISWTMED

(4)

CC D

Peak I/O current for

MEDIUM

configuration

CL = 25 pF

VDD = 5.0 V ± 10%,

PAD3V5V = 0

—

28.8

VDD = 3.3 V ± 10%,

PAD3V5V = 1

—

16.3

ISWTFST

(4)

CC D

Peak I/O current for

FAST configuration

CL = 25 pF

VDD = 5.0 V ± 10%,

PAD3V5V = 0

—

113.5

VDD = 3.3 V ± 10%,

PAD3V5V = 1

—

52.1

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