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WM8961 Datasheet(PDF) 85 Page - Wolfson Microelectronics plc |
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WM8961 Datasheet(HTML) 85 Page - Wolfson Microelectronics plc |
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85 / 116 page ![]() WM8961 Pre-Production w PP, August 2009, Rev 3.1 85 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R5 (05h) ADC and DAC Control 1 6:5 ADCPOL[1:0] 00 ADC Data invert 00 : Both Channels normal polarity 01 : Left Channel Inverted 10 : Right Channel Inverted 11 : Both Channels Inverted 3 DACMU 1 Digital DAC mute 2:1 DEEMPH[1:0] 00 DAC De-emphasis Filter Control 00: no de-emphasis 01: De-emphasis for 32kHz sample rate 10: De-emphasis for 44.1kHz sample rate 11: De-emphasis for 48kHz sample rate 0 ADCHPD 0 Disables high pass filter Register 05h ADC and DAC Control 1 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R6 (06h) ADC and DAC Control 2 8:7 ADC_HPF_CUT[1:0] 00 ADC High Pass Filter Cutoff 00: Hi-fi mode (fc=4Hz at fs=48kHz) 01: Voice mode 1 (fc=127 at fs=16kHz) 10: Voice mode 2 (fc=130 at fs=8kHz) 11: Voice mode 3 (fc=267Hz at fs=8kHz) (Note: fc scales with sample rate. See Table 14 for cut-off frequencies at all supported sample rates) 6:5 DACPOL[1:0] 00 DAC Data invert 00 : Both Channels normal polarity 01 : Left Channel Inverted 10 : Right Channel Inverted 11 : Both Channels Inverted 3 DACSMM 0 0=No soft mute 1=slow volume ramp when DAC muted/un-muted. 2 DACMR 0 Select fast or slow volume ramp up and down 0: Fast Ramp Rate (24kHz at fs=48k, providing maximum delay of 10.7ms) 1: Slow ramp rate (1.5kHz at fs=48kHz, providing maximum delay of 171ms) 1 DACSLOPE 0 Sloping stop band enable 0 DAC_OSR128 0 DAC 128 Over Sampling Rate 0: 64x DAC oversampling 1: If MANUAL_MODE=0, automatically configure DACDIV[2:0] for 128OSR mode. This will give a SNR improvement at the expense of power Register 06h ADC and DAC Control 2 |
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