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PXR40 Datasheet(PDF) 68 Page - Freescale Semiconductor, Inc

Part # PXR40
Description  PXR40 Microcontroller
PDF  100 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PXR40 Datasheet(HTML) 68 Page - Freescale Semiconductor, Inc

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PXR40 Microcontroller Data Sheet, Rev. 1
Electrical characteristics
Freescale Semiconductor
68
5.9
eQADC electrical characteristics
Table 17. eQADC Conversion Specifications (Operating)
Spec
Characteristic
Symbol
Min
Max
Unit
1
ADC Clock (ADCLK) Frequency
fADCLK
216
MHz
2
Conversion Cycles
Single Ended Conversion Cycles 12 bit resolution
Single Ended Conversion Cycles 10 bit resolution
Single Ended Conversion Cycles 8 bit resolution
Note: Differential conversion (min) is one clock
cycle less than the single-ended
conversion values listed here.
CC
2+14
2+12
2+10
128 + 14
128 + 12
128 + 10
ADCLK cycles
3
Stop Mode Recovery Time1
1 Stop mode recovery time is the time from the setting of either of the enable bits in the ADC Control Register to the time that
the ADC is ready to perform conversions. Delay from power up to full accuracy = 8 ms.
TSR
10
—
s
4
Resolution2
2 At V
RH –VRL = 5.12 V, one count = 1.25 mV without using pregain.
—1.25
—
mV
5
INL: 8 MHz ADC Clock3
3 INL and DNL are tested from V
RL + 50 LSB to VRH – 50 LSB. The eQADC is guaranteed to be monotonic at 10 bit accuracy
(12 bit resolution selected).
INL8
–44
4 New design target. Actual specification will change following characterization. Margin for manufacturing has not been fully
included.
44
LSB5
5 At V
RH –VRL = 5.12 V, one LSB = 1.25 mV.
6
INL: 16 MHz ADC Clock3
INL16
–84
84
LSB
7
DNL: 8 MHz ADC Clock3
DNL8
–34
34
LSB
8
DNL: 16 MHz ADC Clock3
DNL16
–34
34
LSB
9
Offset Error without Calibration
OFFNC
04
1004
LSB
10
Offset Error with Calibration
OFFWC
–44
44
LSB
11
Full Scale Gain Error without Calibration
GAINNC
–1204
04
LSB
12
Full Scale Gain Error with Calibration
GAINWC
–44,6
6 The value is valid at 8 MHz, it is ±8 counts at 16 Mhz.
44,6
LSB
13
Non-Disruptive Input Injection Current 7, 8, 9, 10
7 Below disruptive current conditions, the channel being stressed has conversion values of $3FF for analog inputs greater than
VRH and $000 for values less than VRL. Other channels are not affected by non-disruptive conditions.
IINJ
–3
3
m
14
Incremental Error due to injection current11, 12
EINJ
–44
44
Counts
15
TUE value at 8 MHz 13, 14 (with calibration)
TUE8
–44,6
44,6
Counts
16
TUE value at 16 MHz 13, 14 (with calibration)
TUE16
–8
8
Counts
17
Maximum differential voltage15
(DANx+ - DANx-) or (DANx- - DANx+)
PREGAIN set to 1X setting
PREGAIN set to 2X setting
PREGAIN set to 4X setting
DIFFmax
DIFFmax2
DIFFmax4
—
—
—
(VRH –VRL)/2
(VRH –VRL)/4
(VRH -VRL)/8
V
V
V
18
Differential input Common mode voltage15
(DANx- + DANx+)/2
DIFFcmv
(VRH –VRL)/2
–5%
(VRH –VRL)/2
+5%
V



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