ACT8600 datasheet(45/50 Pages) ACTIVE-SEMI

45 / 50 page

ACT8600

Rev 3, 15-Nov-12

Innovative Power

ActivePMU

TM and ActivePathTM are trademarks of Active-Semi.

2CTM is a trademark of NXP.

- 45 -

www.active-semi.com

The charge termination voltage is highly accurate

(±0.5%), and features a selection of charge safety

timeout periods that protect the system from

operation with damaged cells. Other features

include pin-programmable fast-charge current and

one current-limited nSTAT output that can directly

drive LED indicator or provide a logic-level status

signal to the host microprocessor

Dynamic Charge Current Control (DCCC)

The ACT8600's ActivePathTM charger features

dynamic charge current control (DCCC) circuitry,

which acts to ensure that the system remains

powered while operating within the maximum output

capability of the power adapter. The DCCC circuitry

continuously monitors VSYS, and if the voltage at

VSYS drops by more than 200mV, the DCCC

circuitry automatically reduces charge current in

order to prevent VSYS from continuing to drop.

Charge Current Programming

The ACT8600's ActivePathTM charger features a

flexible charge current-programming scheme that

combines the convenience of internal charge

current programming with the flexibility of resistor

based charge current programming. Current limits

and charge current programming are managed as a

function of the CHGIN/VBUS configuration and

CHGLEV pins, in combination with RISET, the

resistance connected to the ISET pin.

When charging from CHGIN, the charger operates

in “AC-mode' with a charge current programmed by

RISET, and charge current is given by:

RISET (kΩ) = 2336 × (1V/ICHG(mA)) - 0.205

When charging from VBUS, the charger operates in

“USB-Mode”, with a maximum charge current

defined by the CHGLEV input, and Q3DBILIM[ ]

settings as summarized in Table 8.

Note that the actual charge current may be limited

to a current lower than the programmed fast charge

current due to the ACT8600’s internal thermal

regulation loop. See the Thermal Regulation section

for more information.

Charger Input Interrupts

In order to ease input supply detection and

eliminate the size and cost of external detection

circuitry, the charger has the ability to generate

interrupts based upon the status of the input supply.

This function is capable of generating an interrupt

when the input is connected, disconnected, or both.

CHGIN Detection

An interrupt is generated any time the input supply

is connected to CHGIN when INSTAT[ ] bit is set to

1 and the INCON[-] bit is set to 1, and an interrupt is

generated any time the input supply is disconnected

when INSTAT[ ] bit is set to 1 and the INDIS[ ] bit is

set to 1.

The status of the input may be read at any time by

reading the INDAT[-] bit, where a value of 1

indicates

that

the

valid

input

(VCHGIN

UVLO<VCHGIN<VOVP) is present, and a value of 0

indicates that a valid input is not present. Reading

the INSTAT[-] bit indicates when the input has

generated an interrupt; this bit will normally return a

value of 0, but will return value of 1 when an input

interrupt has been generated then the interrupt is

automatically cleared to 0 upon reading.

VBUS Detection

When a valid input supply is connected to VBUS,

an interrupt is generated when INVBUSR[ ] and

nVBUSMSK[] is set. Similarly, an interrupt is

generated when the input supply is disconnected

from VBUS when INVBUSF[ ] and nVBUSMSK[ ] is

set. The value of VBUSSTAT[ ], which indicate the

status of VBUS interrupts, is 1 if an interrupt is

generated by either INVBUSR[ ] or INVBUSF[ ].

VBUSDAT[ ] provides the real time status of VBUS

and its value is 1 when a valid charging source is

present at VBUS.

CHARGING

SOURCE

CHGLEV

Q3DBILIM

CHARGE CURRENT

(mA)

PRECONDITION CHARGE CURRENT

(mA)

VBUS

Min (75mA, ICHG )

Min (75mA, 10% × ICHG )

VBUS

Min (450mA, ICHG )

10% × ICHG

VBUS

Min (900mA, ICHG )

10% × ICHG

CHGIN

ICHG

10% × ICHG

Table 8:

Charge Current Programming

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