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M68ICS08GR Datasheet(PDF) 195 Page - Freescale Semiconductor, Inc |
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M68ICS08GR Datasheet(HTML) 195 Page - Freescale Semiconductor, Inc |
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195 / 408 page ![]() Monitor ROM (MON) Functional Description MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA Monitor ROM (MON) 195 Figure 15-2. Low-Voltage Monitor Mode Entry Flowchart Enter monitor mode with pin configuration shown in Figure 15-1 by pulling RST low and then high. The rising edge of RST latches monitor mode. Once monitor mode is latched, the values on the specified pins can change. Once out of reset, the MCU waits for the host to send eight security bytes. (See Security.) After the security bytes, the MCU sends a break signal (10 consecutive logic 0s) to the host, indicating that it is ready to receive a command. NOTE: The PTA1 pin must remain at logic 0 for 24 bus cycles after the RST pin goes high to enter monitor mode properly. In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow code execution from the internal monitor firmware instead of user code. NOTE: Exiting monitor mode after it has been initiated by having a blank reset vector requires a power-on reset. Pulling RST low will not exit monitor mode in this situation. IS VECTOR BLANK? POR TRIGGERED? NORMAL USER MODE MONITOR MODE EXECUTE MONITOR CODE NO NO YES YES POR RESET Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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