M68ICS08GR datasheet(198/408 Pages) FREESCALE

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Monitor ROM (MON)

Technical Data

MC68HC908GR8 — Rev 4.0

198

Monitor ROM (MON)

MOTOROLA

The monitor ROM firmware echoes each received byte back to the PTA0

pin for error checking. An 11-bit delay at the end of each command

allows the host to send a break character to cancel the command. A

delay of two bit times occurs before each echo and before READ,

IREAD, or READSP data is returned. The data returned by a read

command appears after the echo of the last byte of the command.

NOTE:

Wait one bit time after each echo before sending the next byte.

Figure 15-5. Read Transaction

Figure 15-6. Write Transaction

READ

ECHO

FROM

HOST

ADDRESS

HIGH

ADDRESS

HIGH

ADDRESS

LOW

ADDRESS

LOW

DATA

RETURN

13, 2

Notes:

2 = Data return delay, 2 bit times

3 = Cancel command delay, 11 bit times

4 = Wait 1 bit time before sending next byte.

1 = Echo delay, 2 bit times

WRITE

ECHO

FROM

HOST

ADDRESS

HIGH

ADDRESS

HIGH

ADDRESS

LOW

ADDRESS

LOW

DATA

Notes:

2 = Cancel command delay, 11 bit times

3 = Wait 1 bit time before sending next byte.

32, 3

1 = Echo delay, 2 bit times

Freescale Semiconductor, Inc.

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