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DSPIC33FJ06GS201TE/MM Datasheet(PDF) 235 Page - Microchip Technology |
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DSPIC33FJ06GS201TE/MM Datasheet(HTML) 235 Page - Microchip Technology |
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235 / 346 page  © 2009 Microchip Technology Inc. Preliminary DS70318D-page 233 dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 bit 3 BRGH: High Baud Rate Enable bit 1 = BRG generates 4 clocks per bit period (4x baud clock, High-Speed mode) 0 = BRG generates 16 clocks per bit period (16x baud clock, Standard mode) bit 2-1 PDSEL<1:0>: Parity and Data Selection bits 11 = 9-bit data, no parity 10 = 8-bit data, odd parity 01 = 8-bit data, even parity 00 = 8-bit data, no parity bit 0 STSEL: Stop Bit Selection bit 1 = Two Stop bits 0 = One Stop bit REGISTER 18-1: UxMODE: UARTx MODE REGISTER (CONTINUED) Note 1: Refer to Section 17. “UART” (DS70188) in the “dsPIC33F Family Reference Manual” for information on enabling the UART module for receive or transmit operation. 2: This feature is only available for the 16x BRG mode (BRGH = 0). |
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