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DSPIC33FJ06GS201TE/MM Datasheet(PDF) 237 Page - Microchip Technology

Part # DSPIC33FJ06GS201TE/MM
Description  High-Performance, 16-bit Digital Signal Controllers
PDF  346 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ06GS201TE/MM Datasheet(HTML) 237 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 235
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
bit 5
ADDEN:
Address Character Detect bit (bit 8 of received data = 1)
1
= Address Detect mode enabled. If 9-bit mode is not selected, this does not take effect.
0
= Address Detect mode disabled
bit 4
RIDLE:
Receiver Idle bit (read-only)
1
= Receiver is Idle
0
= Receiver is active
bit 3
PERR:
Parity Error Status bit (read-only)
1
= Parity error has been detected for the current character (character at the top of the receive FIFO)
0
= Parity error has not been detected
bit 2
FERR:
Framing Error Status bit (read-only)
1
= Framing error has been detected for the current character (character at the top of the receive
FIFO)
0
= Framing error has not been detected
bit 1
OERR:
Receive Buffer Overrun Error Status bit (clear/read-only)
1
= Receive buffer has overflowed
0
= Receive buffer has not overflowed. Clearing a previously set OERR bit (1
→ 0 transition) will reset
the receiver buffer and the UxRSR to the empty state.
bit 0
URXDA:
Receive Buffer Data Available bit (read-only)
1
= Receive buffer has data, at least one more character can be read
0
= Receive buffer is empty
REGISTER 18-2:
UxSTA: UARTx STATUS AND CONTROL REGISTER (CONTINUED)
Note 1:
Refer to Section 17. “UART” (DS70188) in the “dsPIC33F Family Reference Manual” for information on
enabling the UART module for transmit operation.



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