DSPIC33FJ06GS201TESLASHMM datasheet(331/346 Pages) MICROCHIP

331 / 346 page

Preliminary

DS70318D-page 329

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

APPENDIX A:

REVISION HISTORY

Revision A (January 2008)

This is the initial revision of this document.

Revision B (June 2008)

This revision includes minor typographical and

formatting changes throughout the data sheet text. In

addition, redundant information was removed that is

now available in the respective chapters of the

dsPIC33F Family Reference Manual

, which can be

obtained

from

the

Microchip

website

(www.microchip.com).

The major changes are referenced by their respective

section in the following table.

TABLE A-1:

MAJOR SECTION UPDATES

Section Name

Update Description

“High-Performance, 16-Bit Digital

Signal Controllers”

Moved location of Note 1 (RP# pin) references (see “Pin Diagrams”).

Section 3.0 “Memory Organization”

Updated CPU Core Register map SFR reset value for CORCON (see

Table 3-1).

Removed Interrupt Controller Register Map SFR IPC29 and updated reset

values for IPC0, IPC1, IPC14, IPC16, IPC23, IPC24, IPC27, and IPC28 (see

Table 3-5).

Removed Interrupt Controller Register Map SFR IPC24 and IPC29 and

updated reset values for IPC0, IPC1, IPC2, IPC14, IPC16, IPC23, IPC27,

and IPC28 (see Table 3-6).

Removed Interrupt Controller Register Map SFR IPC24 and updated reset

values for IPC1, IPC2, IPC4, IPC14, IPC16, IPC23, IPC24, IPC27, and

IPC28 (see Table 3-7).

Updated Interrupt Controller Register Map SFR reset values for IPC1,

IPC14, IPC16, IPC23, IPC24, IPC27, and IPC28 (see Table 3-8).

Updated Interrupt Controller Register Map SFR reset values for IPC1,

IPC14, IPC16, IPC23, IPC24, IPC25, IPC26, IPC27, IPC28, and IPC29 (see

Table 3-9).

Updated Interrupt Controller Register Map SFR reset values for IPC1, IPC4,

IPC14, IPC16, IPC23, IPC24, IPC25, IPC26, IPC27, IPC28, and IPC29 (see

Table 3-10).

Added SFR definitions for RPOR16 and RPOR17 (see Table 3-34,

Table 3-35, and Table 3-36).

Updated bit definitions for PORTA, PORTB, and PORTC SFRs (ODCA,

ODCB, and ODCC) (see Table 3-37, Table 3-38, Table 3-39, and

Table 3-40).

Updated bit definitions and reset value for System Control Register map

SFR CLKDIV (see Table 3-41).

Added device-specific information to title of PMD Register Map (see

Table 3-47).

Added device-specific PMD Register Maps (see Table 3-46, Table 3-45, and

Table 3-43).

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