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DSPIC33FJ06GS201TE/MM Datasheet(PDF) 152 Page - Microchip Technology |
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DSPIC33FJ06GS201TE/MM Datasheet(HTML) 152 Page - Microchip Technology |
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152 / 346 page ![]() dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 DS70318D-page 150 Preliminary © 2009 Microchip Technology Inc. REGISTER 9-2: PMD2: PERIPHERAL MODULE DISABLE CONTROL REGISTER 2 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 — — — — — —IC2MD IC1MD bit 15 bit 8 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 — — — — — —OC2MD OC1MD bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-10 Unimplemented: Read as ‘0’ bit 9 IC2MD : Input Capture 2 Module Disable bit 1 = Input Capture 2 module is disabled 0 = Input Capture 2 module is enabled bit 8 IC1MD : Input Capture 1 Module Disable bit 1 = Input Capture 1 module is disabled 0 = Input Capture 1 module is enabled bit 7-2 Unimplemented: Read as ‘0’ bit 1 OC2MD : Output Compare 2 Module Disable bit 1 = Output Compare 2 module is disabled 0 = Output Compare 2 module is enabled bit 0 OC1MD : Output Compare 1 Module Disable bit 1 = Output Compare 1 module is disabled 0 = Output Compare 1 module is enabled |
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