DSPIC33FJ06GS201TESLASHMM datasheet(195/346 Pages) MICROCHIP

195 / 346 page

Preliminary

DS70318D-page 193

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

14.0

OUTPUT COMPARE

The output compare module can select either Timer2 or

Timer3 for its time base. The module compares the

value of the timer with the value of one or two Compare

registers depending on the operating mode selected.

The state of the output pin changes when the timer

value matches the Compare register value. The output

compare module generates either a single output

pulse, or a sequence of output pulses, by changing the

state of the output pin on the compare match events.

The output compare module can also generate

interrupts on compare match events.

The output compare module has multiple operating

modes:

• Active-Low One-Shot mode

• Active-High One-Shot mode

• Toggle mode

• Delayed One-Shot mode

• Continuous Pulse mode

• PWM mode without Fault Protection

• PWM mode with Fault Protection

FIGURE 14-1:

OUTPUT COMPARE MODULE BLOCK DIAGRAM

Note:

This data sheet summarizes the features

the

dsPIC33FJ06GS101/X02

and

dsPIC33FJ16GSX02/X04

families

devices. It is not intended to be a

comprehensive reference source. To

complement the information in this data

sheet, refer to the “dsPIC33F Family

Reference Manual”

, Section 13. “Output

Compare”

(DS70209), which is available

the

Microchip

web

site

(www.microchip.com).

OCxR

Comparator

Output

Logic

OCM<2:0>

Output Enable

OCx

Set Flag bit

OCxIF

OCxRS

Mode Select

OCTSEL

OCFA

TMR2

TMR3

Rollover Rollover

Note:

An ‘x’ in a signal, register or bit name denotes the number of the output compare channels.

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