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IO96NDB2V1 Datasheet(PDF) 47 Page - Microsemi Corporation

Part # IO96NDB2V1
Description  ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology
PDF  242 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

IO96NDB2V1 Datasheet(HTML) 47 Page - Microsemi Corporation

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ProASIC3L Low Power Flash FPGAs
Revision 13
2-31
LVDS
24 mA
–
High –
– 0.66 1.43 0.04 1.85
–––
–––––
ns
LVPECL
24 mA
–
High –
– 0.66 1.37 0.04 1.67
–––
–––––
ns
Table 2-33 • Summary of I/O Timing Characteristics—Software Default Settings
–1 Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst Case VCC = 1.14 V, Worst Case
VCCI
Advanced I/O Banks
I/O Standard
3.3 V LVTTL /
3.3 V LVCMOS
12 mA 12 mA High 5 pF
– 0.60 1.83 0.04 0.78 0.43 1.87 1.39 2.46 2.74 3.58 3.10 ns
3.3 V LVCMOS
Wide Range1,2
100 µA 12 mA High 5 pF
–
–
–
–
–
–
–
–
–
–
–
–
ns
2.5 V LVCMOS
12 mA 12 mA High 5 pF
– 0.60 1.85 0.04 1.00 0.43 1.88 1.55 2.53 2.63 3.59 3.26 ns
1.8 V LVCMOS
12 mA 12 mA High 5 pF
– 0.60 2.04 0.04 0.93 0.43 2.08 1.73 2.83 3.12 3.79 3.45 ns
1.5 V LVCMOS
12 mA 12 mA High 5 pF
– 0.60 2.33 0.04 1.10 0.43 2.37 2.01 3.02 3.22 4.08 3.72 ns
1.2 V LVCMOS
2 mA
2 mA High 5pF
– 0.60 3.17 0.04 1.55 0.43 2.11 1.76 2.38 2.46 3.76 3.41 ns
1.2 V LVCMOS
Wide Range1,3
100 µA 2 mA High 5 pF
–
–
–
–
–
–
–
–
–
–
–
–
ns
3.3 V PCI
Per
PCI
spec.
–
High 10
pF
25 4 0.60 2.05 0.04 0.66 0.43 2.09 1.49 2.46 2.74 3.80 3.21 ns
Table 2-32 • Summary of I/O Timing Characteristics—Software Default Settings
–1 Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst Case VCC = 1.14 V,
Worst Case VCCI
Pro I/O Banks
Standard
Notes:
1. The minimum drive strength for any LVCMOS 1.2 V or LVCMOS 3.3 V software configuration when run in wide range is
±100 µA. Drive strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the
IBIS models.
2. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
3. All LVCMOS 1.2 V software macros support LVCMOS 1.2 V wide range as specified in the JESD8-12 specification.
4. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See Figure 2-12 on page 2-81 for
connectivity. This resistor is not required during normal operation.
5. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.
6. Output drive strength is below JEDEC specification.



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